KEMET's High Voltage Surface Mount Capacitors are designed to withstand high voltage applications. They
offer high capacitance with low leakage current and low ESR at high frequency. The capacitors have pure tin
(Sn) plated external electrodes for good solderability. X7R dielectrics are not designed for AC line filtering
applications. An insulating coating may be required to prevent surface arcing. These components are RoHS
compliant.
APPLICATIONS
ApplicationsMarkets
MARKETS
• Switch Mode Power Supply• Power Supply
• Input Filter• High Voltage Power Supply
• Resonators• DC-DC Converter
• Tank Circuit• LCD Fluorescent Backlight Ballast
• Snubber Circuit• HID Lighting
• Output Filter• Telecommunications Equipment
• High Voltage Coupling• Industrial Equipment/Control
• High Voltage DC Blocking• Medical Equipment/Control
• Lighting Ballast• Computer (LAN/WAN Interface)
• Voltage Multiplier Circuits • Analog and Digital Modems
* Contact KEMET Sales Representative for C, D, F & G Capacitance Tolerance availability.
Note: Actual thickness dimensions may be less than stated maximum. Check the KEMET website, www.kemet.com, for additional values and chip sizes available.
Note: Actual thickness dimensions may be less than stated maximum.
Check the KEMET website, www.kemet.com, for additional values and chip sizes available.
0.067
2000
0.067
2500
0.067
3000
KEMET HIGH VOLTAGE SURFACE MOUNT CHIP (VOLTAGE CODES C,D,F,G,H, and Z)
First two digits represent significant figures.
Third digit specifies number of zeros. 100 pF = 101.
(Use “9” for 1.0 through 9.9 pF)
(Use “8” for 0.1 through .99 pF)
Capacitance Tolerance
Capacitance Tolerance
C = ±0.25pF*J = ±5%
D = ±0.5pF*K = ±10%
F = ±1%*M = ±20%
G = ±2%*
* Contact KEMET Sales for availability.
PropertySpecification
Capacitance
Cap Tolerance
DF
Voltage Ratings500 V, 1000 V, 1500 V, 2000 V, 2500 V, 3000 V
Operating Temperature RangeFrom -55C to +125C
25ºC IR @ 500V
125ºC IR @ 500V
-55ºC TCC
+125ºC TCC
Dielectric Strength
Ripple CurrentConsult KEMET Sales Representative
C0805C102KCRAC
G – (C0G) (±30ppm/C) (-55°C +125°C)
ELECTRICAL PARAMETERS
Electrical Parameters
C0G: 1 pF to 0.010 µF
X7R: 10 pf to 0.22 µF
25°C, 1.0 ± 0.2 Vrms, 1 kHz (1 MHz for ≤ 1000 pF (C0G only)
C0G: C*, D*, F*, G*, J, K, M * Contact KEMET Sales for availability.
X7R: J, K, M
C0G: 0.1% Max
X7R: 2.5% Max
100 GΩ or 1000 MΩ-µF, whichever is less
10 GΩ or 100 MΩ-µF, whichever is less
X7R: + 15%
C0G: + 30 ppm / ºC
150% of Rated Voltage for Rated Voltage <1000 V
120% of Rated Voltage for Rated Voltage >=1000V
pF
From -55ºC to +125ºC
End Metallization
End Metallization
C = Standard
Failure Rate Level
Failure Rate Level
A = Not Applicable
Temperature Characteristic
Temperature Characteristic
Designated by Capacitance
Change over Temperature Range
R – X7R (±15%) (-55°C +125°C)
Voltage
C = 500VG = 2000V
D = 1000VZ = 2500V
F = 1500VH = 3000V
Voltage
84
MARKING
Marking
These chips are supplied unmarked. If required, they can be supplied LASER-marked at an extra cost.
Details on the marking format is located on page 97.
Packaging
PACKAGING
KEMET High Voltage Surface Mount MLCC are available packaged in tape and reel configuration, or bulk
bag as outlined on page 83. Please consult factory for waffle packaging options.
SOLDERING PROCESS
Soldering Process
The 0805 and 1206 case sizes are suitable for either reflow or wave soldering processes. Sizes 1210 and
larger should be limited to reflow soldering only. All sizes incorporate the standard KEMET barrier layer of
pure nickel with an overplating of pure tin (Sn) for excellent solderability and resistance to solder leaching of
the termination.
KEMET offers Multilayer Ceramic Chip Capacitors
packaged in 8mm and 12mm plastic tape on 7" and
13" reels in accordance with EIA standard 481-1:
Taping of surface mount components for automatic
handling. This packaging system is compatible with all
tape fed automatic pick and place systems. See page 78
for details on reeling quantities for commercial chips
and page 87 for MIL-PRF-55681 chips.
handling. This packaging system is compatible with alltapefedautomaticpickandplacesystems. See page 81for details on reeling quantities for commercial chipsand page 90 for MIL-PRF-55681 chips.
Anti-Static Reel
Embossed Carrier*
0402 and 0603 case sizes
available on punched paper only.
Chip Orientation
in Pocket
(except 1825 Commercial, and 1825 & 2225 Military)
178mm (7.00")
330mm (13.00")
Grid
Grid
placement
courtyard
Placement
Courtyard
X
X
Y
8mm ±.30
(.315 ±.012")
or
or
12mm ±.30
(.472 ±.012")
* Punched paper carrier used for 0402 and 0603 case size.
Anti-Static Cover Tape
(.10mm (.004") Max Thickness)
SURFACE MOUNT LAND DIMENSIONS - CERAMIC CHIP CAPACITORS - MM
Z
Dimension
C
C
0402
0603
0805
1206
1210
1812
1825
2220
2225
G
G
Z
Y
Z
Calculation Formula
Z = Lmin + 2Jt + Tt
G = Smax - 2Jh -Th
X = Wmin + 2Js + Ts
Tt, Th, Ts = Combined tolerances
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape WidthPeel Strength
8 mm0.1 Newton to 1.0 Newton (10g to 100g)
12 mm0.1 Newton to 1.3 Newton (10g to 130g)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier
tape shall be 165 to 180 from the plane of the carrier tape. During peeling, the carrier and/or cover tape
shall be pulled at a velocity of 300 ±10 mm/minute.
3. Reel Sizes: Molded tantalum capacitors are available on either 180 mm (7") reels (standard) or 330 mm (13")
reels (with C-7280). Note that 13” reels are preferred.
4. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes.
Refer to EIA-556.
Embossed Carrier Tape Configuration: Figure 1
NOTES
1. B1 dimension is a reference dimension for tape feeder clearance only.
2. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of
embossment location and hole location shall be applied independent of each other.
3. Tape with components shall pass around radius “R” without damage (see sketch A). The minimum trailer length (Fig. 2) may require
additional length to provide R min. for 12 mm embossed tape for reels with hub diameters approaching N min. (Table 2)
4. The cavity defined by A
0
, B0, and K0shall be configured to surround the part with sufficient clearance such that the chip does not pro-
trude beyond the sealing plane of the cover tape, the chip can be removed from the cavity in a vertical direction without mechanical
restriction, rotation of the chip is limited to 20 degrees maximum in all 3 planes, and lateral movement of the chip is restricted to 0.5 mm
maximum in the pocket (not applicable to vertical clearance.)
Table 1 — EMBOSSED TAPE DIMENSIONS (Metric will govern)
10 pitches cumulative
tolerance on tape
±0.2 (±0.008)
2
Center lines
of cavity
T
1
0.10
(.004)
(.030)
Max.
G
1
0.75
Min.
G
G
2
0.75
(.030)
Min.
E
2
Tape
Size
8mm
and
12mm
Bottom
Tape
Cover
D
0
1.5
+0.10, -0.0
(.059
+0.004, -0.0)
T
To p
Tape
Cover
T
1
User Direction of Feed
Table 1: 8 & 12mm Punched Tape
Constant Dimensions - Millimeters (Inches)
E
1.75 ±0.10
(.069 ±0.004)
P
0
D
0
A
0
B
0
P
1
Max. Cavity Size
See Note 1
Table 1
P
(Metric Dimensions Will Govern)
P
0
4.0 ± 0.10
(.157 ± 0.004)
P
2
2.0 ± 0.05
(.079 ± 0.002)
F
W
R Min.
25 (.984)
See Note 2
Table 1
Tape
Size
8mm
1/2
Pitch
8mm4.0 ± 0.10
12mm4.0 ± 0.10
12mm
Double
Pitch
Note:
1. A0, B0 and T determined by the maximum dimensions to the ends of the terminals extending from the
body and/or the body dimensions of the component. The clearance between the ends of the terminals or
body of the component to the sides and depth of the cavity (A0, B0 and T) must be within 0.05mm (.002)
minimum and 0.50mm (.020) maximum. The clearance allowed must also prevent rotation of the component
within the cavity of not more than 20 degrees (see sketches A and B).
2. Tape with components shall pass around radius "R" without damage.
3. KEMET nominal thicknesses are: 0402 = 0.6mm and all others 0.95mm minimum.
Sketch A:
Bending Radius
See Note 2
Table 1
P
1
2.0 ± 0.10
(.079 ±.004)
See Require-
ments
Section 3.3 (d)
(0.157 ± .004)
(0.157 ± .004)
8.0 ± 0.10
(0.315 ± .004)
R
(Min.)
Table 1: 8 & 12mm Punched Tape
(
Metric Dimensions Will Govern)
Variable Dimensions - Millimeters (Inches)
F
3.5 ± 0.05
(.138 ± .002)
5.5 ± 0.05
(.217 ± .002)
20°
W
8.0 ± 0.3
(.315 ± 0.012)
12.0 ± 0.3
(.472 ± .012)
Sketch B:
Max. Component
Rotation - Front
Cross Sectional View
A
0B0
See Note 1
Table 1
T
1.1mm (.043)
Max. for Paper
Base Tape and
1.6mm (.063)
Max. for NonPaper Base
Compositions.
See Note 3.
Component Rotation - Top View
Sketch C:
Maximum
component rotation.
20°
Typical
component
center line
96
CERAMIC CHIP CAPACITORS
Packaging Information
Bulk Cassette Packaging (Ceramic Chips only)
(Meets Dimensional Requirements IEC-286-6 and EIAJ 7201)
10*
110 ± 0.7
53.3*
1.5 ±
2.0 ±
3.0 ±
6.8 ± 0.1
8.8 ± 0.1
12.0 ± 0.1
Unit: mm
* Reference
0.1
0
0
0.1
0.2
0
0
0.2
0
0.2
36 ±
31.5 ±
Table 1 – Capacitor Dimensions for Bulk
Cassette Packaging – Millimeters
Metric
Size
Code
1005
1608
2012
Terminations: KEMET nickel barrier layer with a tin overplate.
Laser marking is available as an extra-cost option for
most KEMET ceramic chips. Such marking is two
sided, and includes a K to identify KEMET, followed by
two characters (per EIA-198 - see table below) to
identify the capacitance value. Note that marking is
not available for size 0402 nor for any Y5V chip. In
addition, the 0603 marking option is limited to the K
only.