Datasheet CBT3857 Datasheet (Philips)

Page 1
CBT3857
10-bit bus switch with 10 k pull-down termination resistors
Product specification Supersedes data of 1998 Dec 10
 
1999 Sep 14
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Philips Semiconductors Product specification
10-bit bus switch with 10 kpull-down termination resistors
FEA TURES
Enable signal is SSTL_2 compatible
Optimized for use in Double Data Rate (DDR) SDRAM
applications
Flow-through architecture optimizes PCB layout
Designed to be used with 200 Mbps
Switch on resistance is designed to eliminate the need for series
resistor to DDR SDRAM
Internal 10 k pull-down resistors on B port
Internal 50 k pull-up resistor on output enable input
Full DDR solution provided when used with SSTL16857 and
PCK857
Latch-up protection exceeds 500 mA per JESD78
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
QUICK REFERENCE DATA
SYMBOL PARAMETER
C
t
PLH
t
PHL
C
OUT
I
CCZ
IN
Propagation delay An to Yn
CL = 30 pF; VCC = 3.3 V 720 ps
Input capacitance VI = 0 V or V Output capacitance Outputs disabled; VO = 0 V or V Total supply current VCC = 3.6 V 1 mA
CBT3857
DESCRIPTION
This 10-bit bus switch is designed for 3 V to 3.6 V VCC operation and SSTL_2 output enable (OE
When OE is LOW, the 10-bit bus switch is on and port A is connected to port B. When OE high-impedance state exists between the two ports.
The low on-state resistance of the switch allows connections to be made with minimal propagation delay.
The CBT3857 is characterized for operation from 0°C to +85°C.
CONDITIONS
T
= 25°C; GND = 0 V
amb
CC
CC
) input levels.
is HIGH, the switch is open, and a
TYPICAL UNIT
2.8 pF
6.4 pF
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE ORDER CODE DWG NUMBER
24-Pin Plastic TSSOP Type I 0°C to +85°C CBT3857 PW SOT355–1
PIN CONFIGURATION
V
1
REF
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
A9
11
A10
12
GND
24
Vcc OE
23 22
B1
21
B2
20
B3
19
B4
18
B5
17
B6
16
B7
15
B8 B9
14 13
B10
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
1 V
2, 3, 4, 5, 6,
7, 8, 9, 10, 11
REF
A1–A10 Inputs
Reference output voltage
12 GND Ground (V)
22, 21, 20, 19, 18,
17, 16, 15, 14, 13
B1–B10 Outputs
23 OE Output enable 24 V
CC
Positive supply voltage
FUNCTION TABLE
INPUT
OE
L A port = B port
H Disconnect
H = High voltage level L = Low voltage level
FUNCTION
SA00516
1999 Sep 14 853–2168 22329
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Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
10-bit bus switch with 10 k pull-down termination resistors
LOGIC DIAGRAM (POSITIVE LOGIC)
22
B1
R
INT
13
B10
R
INT
A10
V
OE
A1
REF
2
11
23
1
SW
SW
CBT3857
SIMPLIFIED SCHEMATIC, EACH FET SWITCH
BA
OE
SA00518
SA00517
ABSOLUTE MAXIMUM RA TINGS
SYMBOL
V
CC
I
IK
V
I
T
stg
V
I
DC supply voltage –0.5 to +4.6 V DC input clamp current V DC input voltage range (OE only) Storage temperature range –65 to 150 °C DC input voltage range (except OE)
PARAMETER CONDITIONS RATING UNIT
1, 3
< 0 –50 mA
2
2
I/O
VCC + 0.5 V
–0.5 to 4.6 V
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. The package thermal impedance is calculated in accordance with JESD 51.
RECOMMENDED OPERATING CONDITIONS
LIMITS
Min Typ Max
V
V
REF
V V V V
T
amb
NOTE:
1. All unused control inputs of the device must be held at V
DC supply voltage 3 3.3 3.6 V
CC
Reference voltage (0.38 x VCC) 1.15 1.25 1.35 V
V
+
AC high-level input voltage
IH
AC low-level Input voltage V
IL
DC high-level input voltage
IH
DC low-level Input voltage V
IL
REF
350 mV
V
REF
180 mV
– 350 mV V
REF
+
– 180 mV V
REF
Operating free-air temperature range 0 +85 °C
or GND to ensure proper device operation.
CC
V
V
1999 Sep 14
3
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Philips Semiconductors Product specification
IIInput leakage current
V
V
V
GND
2
SYMBOL
PARAMETER
FROM (INPUT)
TO (OUTPUT)
UNIT
10-bit bus switch with 10 k pull-down
CBT3857
termination resistors
DC ELECTRICAL CHARACTERISTICS
LIMITS
T
SYMBOL PARAMETER TEST CONDITIONS
V
Input clamp voltage VCC = 3 V; II = –18 mA –1.2 V
IK
OE ±0.73 ±500 µA A Port ±0.1 ±1 µA B Port ±20 ±500 µA
V
REF
Ci
O(OFF)
p
I
CC
C
Quiescent supply current VCC = 3.6 V; IO = 0, VI = VCC or GND 0.7 1.5 mA Control pins VI= 3 V or 0 2.8 pF
I
CC
= 3.6 V;
;
Power-off leakage current VO = 3 V or 0; OE = V
VCC = 3 V to 3.6 V; V
r
on
On-resistance
VCC = 3 V to 3.6 V; V
=
or
I
CC
CC
= 0.8 V; VB = 1.15 V 20 24 30
A
= 1.7 V; VB = 1.35 V 20 24 30
A
VCC = 3 V to 3.6 V; VI = 1.25 V; II = ±10 mA 20 24 30
2
r
off
Off-resistance VCC = 3 V to 3.6 V; VI = 1.65 V 1 M
NOTES:
1. All typical values are at V
2. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On–state resistance is
= 3.3 V, T
CC
amb
= 25°C
determined by the lowest voltage of the two (A or B) terminals.
= 0°C to +85°C
amb
Min Typ
±0.1 ±1 µA
6.4 pF
1
Max
UNIT
AC CHARACTERISTICS
VCC = +3.3 V ±0.3 V
Min Max
t
pd
t
en
t
dis
Propagation delay enable OE A or B 1 3 ns disable OE A or B 1 3 ns
NOTE:
1. The propagation delay is based on the RC time constant of the typical on–state resistance of the switch and a load capacitance, when driven by an ideal voltage source (zero output impedance); 24 × 30 pF.
BACK SIDE
FRONT SIDE
1
184/200-pin DDR SDRAM DIMM
SDRAM
SDRAM
SDRAM
CBT CBT CBT CBT CBT CBT CBT CBT CBT
SDRAM
SDRAM
SDRAM
SSTL16857 PCK857SSTL16857
A or B B or A 750 ps
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
CBT3857 (9)
SDRAM
1999 Sep 14
The PLL clock distribution device and SSTL registered drivers reduce signal loads on the memory controller and prevent timing delays and waveform distortions that would cause unreliable operation
4
SW00393
Page 5
Philips Semiconductors Product specification
10-bit bus switch with 10 k pull-down termination resistors
AC WAVEFORMS
VM = 1.5 V, VIN = GND to 3.0 V
2.75 V
t
t
PHZ
PLZ
1.375V
t
PHL
V
REF
V
V
OL
OH
+ 0.15V
– 0.15V
0 V
V
V
SA00513
VIH (AC)
VIL (AC)
3.5V
V
OL
V
OH
0V
SA00514
INPUT
OUTPUT
1.375V
t
PLH
1.25V 1.25V
Waveform 1. Input (An) to Output (Yn) Propagation Delays
Output Control
(Low-level
enabling
Output
Waveform 1
S1 at 4.3 V
(see Note)
Output
Waveform 2
S1 at Open (see Note) *
Note:
Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
V
REF
t
PZL
1.25 V
t
PZH
1.25 V
* VIH = 3.0V with 25 input line impedance
Waveform 2. 3-State Output Enable and Disable Times
CBT3857
TEST CIRCUIT AND WAVEFORMS
From Output Under Test
C
= 30 pF
L
OH
OL
DEFINITIONS
= Load capacitance includes jig and probe capacitance
C
L
500
500
Load Circuit
TEST S1
t
pd
t
PLZ/tPZL
t
PHZ/tPZH
open
4.3 V GND
NOTES:
1. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z
2. The outputs are measured one at a time with one transition per
= 50 Ω, tr 2.5 ns, tf 2.5 ns.
O
measurement.
4.3 V
S1
Open
GND
SA00515
1999 Sep 14
5
Page 6
Philips Semiconductors Product specification
10-bit bus switch with 10 k pull-down termination resistors
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1
CBT3857
1999 Sep 14
6
Page 7
Philips Semiconductors Product specification
10-bit bus switch with 10 k pull-down termination resistors
NOTES
CBT3857
1999 Sep 14
7
Page 8
Philips Semiconductors Product specification
10-bit bus switch with 10 k pull-down termination resistors
Data sheet status
Data sheet status
Objective specification
Preliminary specification
Product specification
Product status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
[1]
CBT3857
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1999
All rights reserved. Printed in U.S.A.
Date of release: 09-99
Document order number: 9397-750 -06413
 
1999 Sep 14
8
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