Audio ICs
PLL frequency synthesizer for tuners
BU2615S / BU2615FS
The BU2615 PLL frequency synthesizers work up through the FM band. Featuring low radiation noise, low power consumption, and highly sensitive built-in RF amps, they support an IF count function.
Applications
Tuners (Mini components, radio cassette players, radio
equipment, etc.)
Features
1) Built-in high-speed prescaler can divide
130MHzVCO.
2) Basic oscillation of 75kHz keeps unnecessary radiation noise to a low level.
3) Low current dissipation (during operation: 4mA, PLL
OFF: 100µA)
4) In addition to the standard FM and AM, also offers the
following 7 frequencies: 25kHz, 12.5kHz, 6.25kHz,
3.125kHz, 5kHz, 3kHz, and 1kHz.
5) Counter for measurement of intermediate frequencies.
6) Unlock detection
7) Seven output ports (open drain).
The BU2614, with three output ports, is also available.
8) Serial data input (CE, CK, DA)
Absolute maximum ratings (Ta = 25C)
Recommended operating power supply voltage
125
Audio ICs BU2615S / BU2615FS
Block diagram
Pin assignments
126
Audio ICs BU2615S / BU2615FS
Pin descriptions
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Audio ICs BU2615S / BU2615FS
Electrical characteristics (unless otherwise noted, Ta = 25C, VDD1 = VDD2 = 5.0V)
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Audio ICs BU2615S / BU2615FS
Explanation of the data
(1) Division data: For D
(2) CT: Frequency measurement beginning data
1: Beginning of measurement
0: Internal counter is reset, IFIN is pulldown.
(3) Output port control data: P0, P1, P2, P3, P4, P5, P6
1: Open drain output ON (P5 is LO)
0: Open drain output OFF (P5 is HI)
(4) R0, R1, R2, standard frequency data
0 through D15 (When S = 1, use D4 through D15.)
(5) S: switch between FMIN and AMIN
0: FMIN 1: AMIN
(6) PS: If this bit is set to ON while AMIN is selected,
swallow counter division is possible.
(7) CH: If this bit set to ON, output port P5 goes to
phase comparison output. 0: P5 1: PD2
(8) GT: Frequency measurement time and unlock
detection ON/OFF
(9) TS: Test data. Input(0).
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Audio ICs BU2615S / BU2615FS
Input data format
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Audio ICs BU2615S / BU2615FS
Frequency counter
(1) Structure
(2) How the frequency counter operates
When control data CT equals 1, the 20-bit counter and
the amp go into operation. When CT equals 0, input pulldown and the counter are reset. Measuring time (gate
pulse) is selected (16ms /32ms) on the basis of control
data GT. When control data CT equals 0, the counter is
reset.
(3) Explanation of output data
D
0: LSB D19: MSB
How the unlock detection circuit operates
When control data GT equals 1, or CT equals 1, the unlock detection circuit goes into operation for 8ms. When
CT equals 1, the unlock detection circuits stops operating
before the frequency counter gate pulse is emitted.
When CT equals 0, or GT equals 0, the unlock detection
circuit is reset.
Explanation of output data
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Audio ICs BU2615S / BU2615FS
How the frequency counter and unlock detection circuit operate
(1) When CT = 1: Frequency count and unlock detection are carried out.
(2) When CT = 0 and GT = 1: Only unlock detection is
carried out.
Explanation of CD terminal
When frequency measurement or unlock detection is finished, the CD terminal goes to LO to indicate that the
count and unlock detection have finished. It also synchronizes with CK to output counter data. When the next
data is input, it goes to HI.
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Audio ICs BU2615S / BU2615FS
External dimensions (Units: mm)
133
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