Datasheet BCW30LT3, BCW30LT1 Datasheet (ON Semiconductor)

Page 1
Semiconductor Components Industries, LLC, 1999
November, 1999 – Rev. 0
1 Publication Order Number:
BCW30LT1/D
BCW30LT1
General Purpose Transistors
PNP Silicon
Rating Symbol Value Unit
Collector-Emitter Voltage V
CEO
–32 Vdc
Collector-Base Voltage V
CBO
–32 Vdc
Emitter-Base Voltage V
EBO
–5.0 Vdc
Collector Current — Continuous I
C
–100 mAdc
THERMAL CHARACTERISTICS
Characteristic Symbol Value Unit
Total Device Dissipation
FR-5 Board
(1)
TA = 25°C Derate above 25°C
P
D
225
1.8
mW
mW/°C
Thermal Resistance,
Junction to Ambient
R
θJA
556 °C/W
Total Device Dissipation
Alumina Substrate,
(2)
TA = 25°C
Derate above 25°C
P
D
300
2.4
mW
mW/°C
Thermal Resistance,
Junction to Ambient
R
θJA
417 °C/W
Junction and Storage Temperature TJ, T
stg
–55 to
+150
°C
(1) FR–5 = 1.0 0.75 0.062 in. (2) Alumina = 0.4 0.3 0.024 in. 99.5% alumina.
Device Package Shipping
ORDERING INFORMATION
BCW30LT1 SOT–23
http://onsemi.com
SOT–23 (TO–236AB)
CASE 318
STYLE 6
3000 Units/Rail
DEVICE MARKING
C2x
x = Monthly Date Code
1
2
3
COLLECTOR
3
1
BASE
2
EMITTER
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2
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector–Emitter Breakdown V oltage
(IC = –2.0 mAdc, IE = 0)
V
(BR)CEO
–32 Vdc
Collector–Emitter Breakdown Voltage
(IC = –100 µAdc, VEB = 0)
V
(BR)CES
–32 Vdc
Collector–Base Breakdown Voltage
(IC = –10 µAdc, IC = 0)
V
(BR)CBO
–32 Vdc
Emitter–Base Breakdown Voltage
(IE = –10 µAdc, IC = 0)
V
(BR)EBO
–5.0 Vdc
Collector Cutoff Current
(VCB = –32 Vdc, IE = 0) (VCB = –32 Vdc, IE = 0, TA = 100°C)
I
CBO
— —
–100
–10
nAdc µAdc
ON CHARACTERISTICS
DC Current Gain
(IC = –2.0 mAdc, VCE = –5.0 Vdc)
h
FE
215 500
Collector–Emitter Saturation Voltage
(IC = –10 mAdc, IB = –0.5 mAdc)
V
CE(sat)
–0.3
Vdc
Base–Emitter On Voltage
(IC = –2.0 mAdc, VCE = –5.0 Vdc)
V
BE(on)
–0.6 –0.75
Vdc
SMALL–SIGNAL CHARACTERISTICS
Output Capacitance
(IE = 0, VCB = –10 Vdc, f = 1.0 MHz)
C
obo
7.0
pF
Noise Figure
(IC = –0.2 mAdc, VCE = –5.0 Vdc, RS = 2.0 kΩ, f = 1.0 kHz, BW = 200 Hz)
NF
10
dB
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3
TYPICAL NOISE CHARACTERISTICS
(VCE = –5.0 Vdc, TA = 25°C)
Figure 1. Noise Voltage
f, FREQUENCY (Hz)
5.0
7.0
10
3.0
Figure 2. Noise Current
f, FREQUENCY (Hz)
1.0 10 20 50 100 200 500 1.0 k 2.0k 5.0 k 10 k
1.0
7.0
5.0
3.0
2.0
1.0
0.7
0.5
0.3
0.1
BANDWIDTH = 1.0 Hz
RS 0
IC = 10 µA
100 µA
e
n
,
N
OISE
V
OLTA
G
E
(
n
V)
I
n
, NOISE CURRENT (pA)
30 µA
BANDWIDTH = 1.0 Hz
RS ≈∞
IC = 1.0 mA
300 µA
100 µA
30 µA
10 µA
10 20 50 100 200 500 1.0k 2.0k 5.0 k 10 k
2.0
1.0 mA
0.2
300 µA
NOISE FIGURE CONTOURS
(VCE = –5.0 Vdc, TA = 25°C)
500 k
100
200
500
1.0 k
10 k
5.0 k
20 k
50 k
100 k
200 k
2.0 k
1.0 M
500 k
100
200
500
1.0 k
10 k
5.0 k
20 k
50 k
100 k
200 k
2.0 k
1.0 M
Figure 3. Narrow Band, 100 Hz
IC, COLLECTOR CURRENT (µA)
Figure 4. Narrow Band, 1.0 kHz
IC, COLLECTOR CURRENT (µA)
10
0.5 dB
BANDWIDTH = 1.0 Hz
R
S
,
SO
U
RCE
RESISTA
N
CE
(
O
H
MS
)
R
S
, SOURCE RESISTANCE (OHMS)
Figure 5. Wideband
IC, COLLECTOR CURRENT (µA)
10
10 Hz to 15.7 kHz
R
S
,
SO
U
RCE
RESISTA
N
CE
(
O
H
MS
)
Noise Figure is Defined as:
NF+20 log
10
ƪ
e
n
2
)
4KTRS)
I
n
2
R
S
2
4KTR
S
ƫ
1ń2
= Noise Voltage of the Transistor referred to the input. (Figure 3) = Noise Current of the Transistor referred to the input. (Figure 4) = Boltzman’s Constant (1.38 x 10
–23
j/°K) = Temperature of the Source Resistance (°K) = Source Resistance (Ohms)
e
n
I
n
K T R
S
1.0 dB
2.0 dB
3.0 dB
20 30 50 70 100 200 300 500 700 1.0 k 10 20 30 50 70 100 200 300 500 700 1.0k
500 k
100
200
500
1.0 k
10 k
5.0 k
20 k
50 k
100 k
200 k
2.0 k
1.0 M
20 30 50 70 100 200 300 500 700 1.0 k
BANDWIDTH = 1.0 Hz
5.0 dB
0.5 dB
1.0 dB
2.0 dB
3.0 dB
5.0 dB
0.5 dB
1.0 dB
2.0 dB
3.0 dB
5.0 dB
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4
TYPICAL STATIC CHARACTERISTICS
Figure 6. DC Current Gain
IC, COLLECTOR CURRENT (mA)
500
0.003
h , DC CURRENT GAIN
FE
TJ = 125°C
–55°C
25°C
VCE = 1.0 V VCE = 10 V
Figure 7. Collector Saturation Region
IC, COLLECTOR CURRENT (mA)
1.4
Figure 8. Collector Characteristics
IC, COLLECTOR CURRENT (mA)
V
,
V
OLTA
G
E
(V
OLTS
)
1.0 2.0 5.0 10 20
50
1.6
100
TJ = 25°C
V
BE(sat)
@ IC/IB = 10
V
CE(sat)
@ IC/IB = 10
V
BE(on)
@ VCE = 1.0 V
*
qVC for V
CE(sat)
qVB for V
BE
0.1 0.2 0.5
BCW29LT1
Figure 9. “On” Voltages
IB, BASE CURRENT (mA)
0.4
0.6
0.8
1.0
0.2
0
V
CE
,
COLLECTOR–EMITTER
V
OLTA
G
E
(V
OLTS
)
0.002
TA = 25°C
BCW29LT1
IC = 1.0 mA 10 mA 100 mA
Figure 10. Temperature Coefficients
50 mA
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
40
60
80
100
20
0
0
I
C
, COLLECTOR CURRENT (mA)
TA = 25°C
PULSE WIDTH = 300 µs
DUTY CYCLE 2.0%
IB = 400 µA
350 µA
300 µA
250 µA
200 µA
*APPLIES for IC/IB hFE/2
25°C to 125°C
–55°C to 25°C
25°C to 125°C
–55°C to 25°C
140
160
0.005 0.01 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1.0
2.0
3.0
5.0 7.0 10 20 30 50 70 100
0.005 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 5.0 10 15 20 25 30 35 40
1.2
1.0
0.8
0.6
0.4
0.2 0
2.4
0.8
0
1.6
0.8
1.0 2.0 5.0 10 20
50
10
0
0.1 0.2 0.5
300
200 180
V
, TEMPERATURE COEFFICIENTS (mV/ C)°θ
150 µA
100 µA
50 µA
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TYPICAL DYNAMIC CHARACTERISTICS
C, CAPACITANCE (pF)
Figure 11. Turn–On Time
IC, COLLECTOR CURRENT (mA)
500
Figure 12. Turn–Off Time
IC, COLLECTOR CURRENT (mA)
2.0 5.0 10
20 30 50
1000
Figure 13. Current–Gain — Bandwidth Product
IC, COLLECTOR CURRENT (mA)
Figure 14. Capacitance
VR, REVERSE VOLTAGE (VOLTS)
Figure 15. Input Impedance
IC, COLLECTOR CURRENT (mA)
Figure 16. Output Admittance
IC, COLLECTOR CURRENT (mA)
3.01.0
500
0.5
10
t
,
TIME
(
ns
)
t, TIME (ns)
f,
C
U
RRE
N
T–
G
AI
N —
BA
NDW
I
D
T
H P
RO
DU
CT
(
M
Hz)
T
h , OUTPUT ADMITTANCE ( mhos)
oe
m
h
ie
,
I
NPU
T
IM
P
E
D
A
N
CE
(
k
)
5.0
7.0
10
20
30
50
70
100
300
7.0
70 100
VCC = 3.0 V IC/IB = 10 TJ = 25°C
td @ V
BE(off)
= 0.5 V
t
r
10
20
30
50
70
100
200
300
500
700
–2.0
–1.0
VCC = –3.0 V IC/IB = 10 IB1 = I
B2
TJ = 25°C
t
s
t
f
50
70
100
200
300
0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 50
TJ = 25°C
VCE = 20 V
5.0 V
1.0
2.0
3.0
5.0
7.0
0.1 0.2 0.5 1.0 2.0 5.0 10 20 500.05
C
ib
C
ob
2.0 5.0 10
20 50
1.0
0.2 100
0.3
0.5
0.7
1.0
2.0
3.0
5.0
7.0
10
20
0.1 0.2 0.5
VCE = –10 Vdc f = 1.0 kHz TA = 25°C
2.0 5.0 10
20 50
1.0
2.0 100
3.0
5.0
7.0
10
20
30
50
70
100
200
0.1 0.2 0.5
VCE = 10 Vdc f = 1.0 kHz TA = 25°C
200
–3.0
–5.0 –7.0
–20
–10
–30
–50 –70
–100
TJ = 25°C
hfe 300
@ IC = –1.0 mA
hfe 300
@ IC = 1.0 mA
Page 6
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6
Figure 17. Thermal Response
t, TIME (ms)
1.0
0.01
r(t)
TRA
N
SIE
N
T
T
H
ERMAL
RESISTA
N
CE
(NORMALIZED)
0.01
0.02
0.03
0.05
0.07
0.1
0.2
0.3
0.5
0.7
0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 500 1.0 k 2.0 k 5.0 k 10k 20 k
50 k
100 k
D = 0.5
0.2
0.1
0.05
0.02
0.01 SINGLE PULSE
DUTY CYCLE, D = t1/t
2
D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 (SEE AN–569) Z
θJA(t)
= r(t) • R
θJA
T
J(pk)
– TA = P
(pk) ZθJA(t)
t
1
t
2
P
(pk)
FIGURE 19
TJ, JUNCTION TEMPERATURE (°C)
10
4
–4
0
I
C
, COLLECTOR CURRENT (nA)
Figure 18. Typical Collector Leakage Current
DESIGN NOTE: USE OF THERMAL RESPONSE DATA
A train of periodical power pulses can be represented by the model as shown in Figure 19. Using the model and the device thermal response the normalized effective transient thermal resistance of Figure 17 was calculated for various duty cycles.
To find Z
θJA(t)
, multiply the value obtained from Figure 17 by the
steady state value R
θJA
.
Example: The BCW29LT1 is dissipating 2.0 watts peak under the following conditions:
t1 = 1.0 ms, t2 = 5.0 ms (D = 0.2) Using Figure 17 at a pulse width of 1.0 ms and D = 0.2, the reading of r(t) is 0.22.
The peak rise in junction temperature is therefore
T = r(t) x P
(pk)
x R
θJA
= 0.22 x 2.0 x 200 = 88°C.
For more information, see AN–569.
10
–2
10
–1
10
0
10
1
10
2
10
3
–200 +20 +40 +60 +80 +100 +120 +140 +160
VCC = 30 V
I
CEO
I
CBO
AND
I
CEX
@ V
BE(off)
= 3.0 V
Page 7
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7
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection
interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
SOT–23
mm
inches
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
SOT–23 POWER DISSIP ATION
The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T
J(max)
, the maximum rated junction temperature of the
die, R
θJA
, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows:
PD =
T
J(max)
– T
A
R
θJA
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
Page 8
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8
P ACKAGE DIMENSIONS
SOT–23 (TO–236AB)
CASE 318–08
ISSUE AF
D
J
K
L
A
C
B
S
H
GV
3
1
2
DIMAMIN MAX MIN MAX
MILLIMETERS
0.1102 0.1197 2.80 3.04
INCHES
B 0.0472 0.0551 1.20 1.40 C 0.0350 0.0440 0.89 1.11 D 0.0150 0.0200 0.37 0.50 G 0.0701 0.0807 1.78 2.04 H 0.0005 0.0040 0.013 0.100
J 0.0034 0.0070 0.085 0.177
K 0.0140 0.0285 0.35 0.69
L 0.0350 0.0401 0.89 1.02 S 0.0830 0.1039 2.10 2.64 V 0.0177 0.0236 0.45 0.60
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability , including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer .
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Fax Response Line: 303–675–2167
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Sales Representative.
BCW30LT1/D
Thermal Clad is a trademark of the Bergquist Company
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