Datasheet BA7230LS Datasheet (ROHM)

1

Multimedia ICs

NTSC color TV signal encoder

BA7230LS

The BA7230LS comprises an RGB signal matrix circuit, balanced modulator circuit (rectangular 2-phase modula­tion), oscillator circuit (VCXO) for a 3.58MHz subcarrier synchronized with video input burst signals, luminosity and
color difference signal mixing circuit, and a high speed switch for selecting composite signals of video input and RGB
input. RGB signals, synch signals, BFP (burst flag pulses), PCP (pedestal clamp pulses) are input, and an NTSC
composite signal is output.

•

Applications

Televisions (Teletext-capable), captain systems, video cameras, personal computers

•

Features

1) Allows superimposition of video images (VIDEO IN)
and computer images (RGB IN).

2) During superimposition, the subcarrier locked onto
the video input burst signal RGB is modulated with
the RGB signals by the APC circuit, preventing
unnatural color disturbance due to switching.

3) Both the RGB and video input signals are pedestal­clamped, maintaining a natural image even during
fluctuation in luminosity.

4) Using a half down pulse, the video signal can be
reduced by 5dB to darken the background and
make the superimposed RGB image easier to see.

5) Carrier leak is suppressible to less than 70mV

P-P

(VOUT = 2VP-P) without adjustment.

6) Can be adapted for analog RGB input.

7) Compact 24-pin SZIP package minimizes external
components.

•

Block diagram

1

VIDEO OUT

3

Y IN

5

R-Y IN

7

VC

9

APC PHASE
ADJUSTMENT

11

VA

13

AR

15

AB

17

B-Y OUT

19

GND

21

PCP IN

23

YSP IN

2

SYNC IN

BA7230LS

4

B-Y IN

6

PD

8

VB

10

BURST LEVEL
ADJUSTMENT

12

BFP IN

14

AG

16

Y OUT

18

R-Y OUT

20

VIDEO IN

22

HDP IN

24

VCC

VCC

B - Y R - Y

+

HD

MATRIX

PD

VCXO

MOD MOD

+

2

Multimedia ICs BA7230LS

•

Input / output circuits

3 2 1 24 23 22

21

20

19

18

17

16

15121110

9

8

7

6

5

4

CLAMP

CLAMP

500Ω

5.6kΩ

1kΩ

9.1kΩ

10kΩ 15kΩ

15kΩ 7.5kΩ

15kΩ

10kΩ

10kΩ

500Ω

10kΩ

10kΩ

1kΩ

1kΩ

5.1kΩ

15kΩ

10kΩ

1.2kΩ

5.1kΩ

11kΩ

4.3kΩ

5kΩ

6.8kΩ
1kΩ

GND

15kΩ

3.2V 2.2V

V

CC

BA7230LS

VCC

3.4V

2.7V

2V

2V

1413

1kΩ

6.8kΩ

1V

Fig. 1

•

Absolute maximum ratings (Ta = 25°C)

•

Recommended operating conditions

Parameter Symbol Limits Unit
Power supply voltage 7.0 V
Power dissipation 500

∗

mW
Operating temperature
Storage temperature

°C
°C

– 20 ~ + 70
– 55 ~ + 125

V

CC

Pd
Topr
Tstg

∗

Reduced by 5.0mW for each increase in Ta of 1°C over 25°C.

Parameter Symbol Limits Unit

V

CC V4.5 ~ 5.5

VR VP-P0 ~ 0.7
VG VP-P0 ~ 0.7
VB VP-P0 ~ 0.7

VIN VP-P0 ~ 1.0

Power supply voltage
R input level
G input level
B input level
Video input level

3

Multimedia ICs BA7230LS

•

Electrical characteristics (unless otherwise noted, Ta = 25°C, VCC = 5.0V)

Parameter Symbol Min. Typ. Max. Conditions

Quiescent current I

Q

—3854mA —

Video output level V

OV

1.7 2.2 2.6 V

P-P

VIDEO IN = 1V

P-P

Half down level change GVH– 3 – 5 – 7 dB —
DC offset V

OF

— 50 160 mV

P-P

VIDEO IN = 1V

P-P

Crosstalk CT — – 46 – 40 dB VIDEO IN = 1V

P-P

V

R-Y

0.3 0.42 0.55 V

P-P

V

B-Y

0.2 0.31 0.42 V

P-P

YOUT output level V

Y

1.0 1.4 1.8 V

P-PVR

= VG = VB = 0.7V

P-P

Ys switching delay time T

D

— 60 — ns —

—SYNC output level V

OS

0.4 0.65 0.9 V

P-P

Burst output level VOB0.25 0.46 0.8 V

P-PRE

= 1.8k

Ω

Composite output level V

OY

1.7 2.2 2.6 V

P-PYIN

= 0.7V

P-P

G

R-Y

91113dB

G

B-Y

91113dB

G

R-B

— — 2 dB Difference between above gains
– 6 — 6 deg —
– 6 — 6 deg —

Carrier leak L

SC

—3070mV

P-PVOUT

= 2V

P-P

APC capture range f

CAP

±

100 — — Hz

Carrier phase range

φSC± 30±

45 — deg Superimposition

Video frequency characteristic f

V

4.5 6 — MHz – 3dB when f = 100kHz

Video output DG DG —

±

3.5 — % VIDEO IN = 1V

P-P

Video output DP DP —± 2.5 — deg VIDEO IN = 1V

P-P

Z

T

815—k

Ω

—

Input impedance (Ys) Z

TY

3 7.5 — k

Ω

—

V

T

0.9 2.0 2.8 V —

Threshold level (Ys) V

TY

0.5 1.1 1.8 V —

Unit

ER-EY output level
EB-EY output level

R-Y modulation gain

B-Y modulation gain

(R-Y) / (B-Y) modulation gain differential

(R-Y) / (B-Y) orthogonal phase shift
(R - Y) ·Burst orthogonal phase shift

Input impedance (SY, BF, PC, HD)

Threshold level (SY, BF, PC, HD)

V

R

= 0.7V

P-P

VB = 0.7V

P-P

R - YIN = 0.3V

P-P

B - YIN = 0.2V

P-P

Burst = 0.1V

P-P

, 2.8µS

∆

R

∆

B

4

Multimedia ICs BA7230LS

•

Measurement circuit

CLAMP

MATRIX

ER - EY

MOD

PD

MOD

E

B - EY

BG

– 5dB

6dB

v

~

v

0.7VP-P
S1 S2 S3 S4

YOUT

VCC

1µF

1µF1µF

0.047µF

1µF

0.047µF

1µF

1µF

+

1VP-P

S5
ab

10µF

SYNC

13

+14+

15

2

24

19

16

Y

IN

YS

VCC

3

23

12

11

178922

10

20

1µF

+

5

1µF

+

4

B - Y

BA7230LS

6dB

R - Y

21

PCP

VIDEO

6

HDP

TC

X'TAL

BFP

2.7kΩ

75Ω

Vector scope

Oscilloscope

75Ω

820Ω

82pF

560Ω

1.8kΩ

68pF

470Ω

10kΩ

1.2kΩ

+

+

+

18

R - Y

~

ICC

+
+

VCXO

BG

1kΩ

1kΩ

75Ω

75Ω

Y

17

B - Y

+

~~

v

Fig. 2

10k

S6

5

Multimedia ICs BA7230LS

CLAMP

MATRIX

ER - EY

MOD

PD

MOD

– 5dB

RG B

R

1

C1

R2 R3

C17

VCC (5V)

C

16

YOUT

R4

DL1

16

+

1µF

1µF

RGB

Video

0.047µF

1µF

+

R15

C9

IN

1kΩ

BFP

VR

4

VCC

VCC

VR3

VR2

C11

Q1

C12

33pF

20pF

C

13

1.2 mH

L

1 R16 1kΩ

2SC2021

C

10

Q2

2SC2021

Burst

LEVEL

ADJ

10µF0.047µF

SYNC

13+14+15

2

24

19

GND

1kΩ

R

5

YS

R6

DL2

R7

1kΩ

1kΩ

1kΩ

DLY

(400ns)

TRP

(3.58M)

DLY

Y

IN

VCC

VR1

VCC

R6

R13

R14

TC1

Q3

R10

R11

R9

C19

R12

2.7k

C

61µ

0.047µF

C

15

C7

C8

C5

APS
PHASE
ADJ

3

23

11

12

OUT

COMPOSITE

789

22

10

20

1µF

+

5

1µF

+

4

17

BA7230LS

B - Y

Y

R - Y

18

6dB

6dB

Y

21

PCP

VIDEO

6

10kΩ

+

75Ω

1.2kΩ

OUT

2SC2021

820Ω

X'TAL

1

10pF

82pF

560Ω

HDP

0dB

– 5dB

560Ω

5kΩ

3kΩ

300Ω

3kΩ

300Ω

68pF

470Ω

10kΩ

+

+

560Ω

560Ω

+
+

(2VP-P)

BG

VCXO

C14

33pF

20pF

C

15

L2

LPF

R

17 1kΩ

EB - EY

1.2mH

C

4

DL1, DL2: X503 (SUMIDA)
L

1, L2: RC-875 1.2mH (SUMIDA)

TC

1: TZ03R200E (MURATA)

Q

1, Q2, Q3: 2SC2021 (ROHM)

XTAL

1: HC – 43U 3579.545kHz (NIKKO DENSHI)

BG

Fig. 3

•

Application example

6

Multimedia ICs BA7230LS

•

Circuit operation
(1) Matrix circuit
The R, G and B inputs are clamped to 3.2V by the
clamp circuit and combined into signals E

Y, ER-EY and

E

B-EY by the resistance-adding matrix circuit.

E

Y = 0.30ER + 0.59EG + 0.11EB

ER – EY = 0.70ER – 0.59EG – 0.11EB

EB – EY = – 0.30ER – 0.59EG + 0.89EB
Signal EY is then amplified by the 6dB amplifier (pin 16) to
compensate for the signal's 6dB attenuation in the delay
line. To prevent overmodulation, signal E

R-EY is output at

1 / 1.14 and signal E

B-EY at 1 / 2.03 (pins 17 and 18).

(2) Balanced modulator circuit
Color difference signals are modulated (rectangular 2­phase balanced modulation) with color subcarriers
(3.58MHz) having a 90° phase difference. This is
called the carrier color signal.

The carrier color signal is mixed with color burst signals
and luminosity signals E

Y' (to which a horizontal syn-

chronization signal is added) to create the NTSC com­posite signal (E

N).

(3) Switch circuit
Signal Ys (pin 23) switches between video input and
RGB composite signals. Performing this switching at
high speeds results in superimposition.

(4) Color subcarrier oscillator circuit
The subcarrier oscillator circuit for RGB input. This cir­cuit is synchronized with the video input color burst sig­nal extracted by BFP (burst flag pulses) during super­imposition, preventing any unnatural color disturbance
due to switching between RGB and video input.
This oscillator circuit generates the RGB color burst
signal. An attached variable resistor can be used to
change the amplitude of the color burst signal and to
adjust its phase relative to the video color burst signal.
This oscillator circuit remains in the free-running state
when there is no video input.

(5) During superimposition, video input can be lowered
by about 5dB using an HDP (half-down pulse), darken­ing the background and making RGB input easier to
see.

13

R

14

G

15

B

10kΩ

5.1kΩ

27kΩ

BA7230LS

Y

Fig. 4

OUT

Y

S

RGB
COMPOSITE

VIDEO IN

Fig. 6

R14

560Ω

C

6

68pF

C

7

82pF

9

TC

1

20pF

R

13

1.2kΩ

XT

1

3.58MHz

87

VCXO

Fig. 7

VIDEO IN

HDP
(Half Down
Pulse)

OUT

Y

S

RGB
COMPOSITE

– 5dB

Fig. 8

Amplitude

R - Y

R - Y

B - Y

E

B - EY

3.58MHz (0°)

C carrier color signal
(combining of R-Y and B-Y)

B - Y

θ

µs

90°

θ

90°

Time

1

3.58

Balanced
modulator

ER - EY

Carrier
color signal

3.58MHz (90°)

Balanced
modulator

+

Fig. 5

EN = EY' + cos2πfst

E

R – EY

1.14

+ sin2πfst

E

B – EY

2.03

7

Multimedia ICs BA7230LS

VIDEO IN

SYNC

VH

1VP-P

VL

TTL LEVEL (∗1)

PCP

VH
VL

TTL LEVEL (∗1)

VH
VL

TTL LEVEL (∗1)

RGB IN

V

L

VL

0.7VP-P

HDP

V

H

TTL LEVEL (∗1)

YS

VH

TTL LEVEL (∗2)

CB

from RGB

COMPOSITE OUT

2V

P-P

CB

SUPER
IMPOSE

CB: COLOR BURST

∗

1 VL: 0 ~ 0.8V VH: 3.0V ~ VCC

∗

2 VL: 0 ~ 0.4V VH: 2.0V ~ VCC

2VP-P

CB

BFP

Fig. 9

•

Input waveform and timing chart

•

Electrical characteristic curves

80

70
60

50
40

30
20

10

QUIESCENT CURRENT: IQ (mA)

0

012345

POWER SUPPLY VOLTAGE: V

CC (V)

6

78

Fig. 10 Quiescent current vs.

power supply voltage

3580.5
f

0 = 3579.545kHz

3580.0

3579.5

3579.0

FREQUENCY: f (free run) (kHz)

3578.5

345

POWER SUPPLY VOLTAGE: V

CC (V)

6

7

Fig. 11 VCXO free-run frequency vs.

power supply voltage

f0 = 3579.545kHz
V

IN = 0.1VP-P

+ lock

+ cap

400

600

200

f

0 = 0

– 200
– 400

– 600

FREQUENCY: f (cap. lock) (Hz)

345

POWER SUPPLY VOLTAGE: V

CC (V)

6

7

– cap

– lock

Fig. 12 Capture range and

lock range (!) vs.
power supply voltage

8

Multimedia ICs BA7230LS

SZIP24

5.8 ± 0.2

9.9 ± 0.5

0.889

1

2

23

24

0.5 ± 0.1

+ 0.1
– 0.05

2.54 ± 0.25

0.3

2.0Min.

21.8 ± 0.2

2.8 ± 0.2

•

Operation notes
(1) RGB and video inputs should be synchronized.
When only RGB is input, connect VIDEO IN (pin 20) to
GND with a 1µF capacitor, and synchronize PCP and
BFP to RGB.
(3) Input pins with pedestal clamps cannot be left open
and must be grounded with a low impedance. When
not used, ground with a 1µF capacitor.
∗Input pins with pedestal clamps:
Y

IN (pin 3), B-YIN (pin 4), R-YIN (pin 5), VIDEO IN (pin 20)

(2) The VCXO remains in a
free-running state except
during superimposition.
(4) Pin 4 (B-Y

IN) and pin 5

(R-Y

IN) have high imped-

ance and are susceptible
to the effects of noise and
other external factors dur­ing pattern generation. For
this reason, we recom­mend adding the circuit in
Fig. 15 to lower the input
impedance. Adding this cir­cuit can also reduce carrier
leakage.

1µF

1µF

1kΩ

Fig. 14

+

+

C12

33pF

20pF

C

13

L1 R16 1kΩ

18

C14

33pF

20pF

C

15

1.2mH

LPF 0.5MHz

L2 R17 1kΩ

17

4

VCC

Q1

Q1, Q2: 2SC2021 (ROHM)

3kΩ

VCC

Q2

C10

C11

3kΩ

300Ω

1µF

1µF

+
+

300Ω

5

1.2mH

Fig. 15

Additional

circuit

+ lock

+ cap

400

600

200

f

0 = 0

– 200

– 400

– 600

FREQUENCY: f (cap. lock) (Hz)

0 200 400

INPUT VOLTAGE: V

IN (mVp-p)

600 700500300100

800

– cap
– lock

f0 = 3579.545kHz
V

CC = 5V

Fig. 13 Capture range and

lock range (@) vs. input
voltage

•

External dimensions (Units: mm)