The 74VHCT32A is an advanced high-speed
CMOS QUAD 2-INPUT OR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer ou tput, whi ch provid es hig h no ise
immunity and stable output.
TSSOPSOP
Table 1: Order Codes
PACKAGET & R
SOP74VHCT32AMTR
TSSOP74VHCT32ATTR
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used t o interf ace 5V to 3V s ince al l
inputs are equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static disc harge, giving
them 2KV ESD immunity and transient excess
voltage.
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) V
CC
2) High or Low State
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage (see note 1)
O
DC Output Voltage (see note 2)-0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
= 0V
Table 5: Recommended Operating Conditions
V
CC
Positive Supply Voltage
-0.5 to +7.0V
-0.5 to +7.0V
-0.5 to +7.0V
- 20mA
± 20mA
± 25mA
± 50mA
-65 to +150°C
300°C
V
SymbolParameterValueUnit
V
V
V
V
T
dt/dv
1) V
CC
2) High or Low State
3) VIN from 0.8V to 2V
Supply Voltage
CC
Input Voltage
I
Output Voltage (see note 1)
O
Output Voltage (see note 2)0 to V
O
Operating Temperature
op
Input Rise and Fall Time (see note 3) (V
= 0V
= 5.0 ± 0.5V)
CC
4.5 to 5.5V
0 to 5.5V
0 to 5.5V
CC
-55 to 125°C
0 to 20ns/V
2/11
V
Page 3
Table 6: DC Specifications
SymbolParameter
V
V
V
+I
I
High Level Input
IH
Voltage
Low Level Input
V
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
I
Quiescent Supply
CC
Current
Additional Worst
CC
Case Supply
Current
Output Leakage
OPD
Current
Test ConditionValue
= 25°C
T
V
CC
(V)
4.5 to
5.5
A
Min.Typ. Max.Min.Max. Min. Max.
222V
4.5 to
5.5
4.5
4.5
4.5
4.5
0 to
VI = 5.5V or GND
5.5
V
5.5
I
O
=-8 mA
I
O
=50 µA
I
O
=8 mA
I
O
= VCC or GND
I
4.44.54.44.4
3.943.83.7
0.00.10.10.1
=-50 µA
One Input at 3.4V,
other input at V
5.5
CC
or GND
= 5.5V
0
V
OUT
74VHCT32A
-40 to 85°C -55 to 125°C
0.80.80.8V
0.360.440.55
± 0.1± 1.0± 1.0µA
22020µA
1.351.51.5mA
0.5 5.0 5.0µA
Unit
V
V
Table 7: AC Electrical Characteristics (Input t
= tf = 3ns)
r
Test ConditionValue
= 25°C
SymbolParameter
t
Propagation Delay
PLH
PHL
Time
t
(*) Voltage range is 5.0V ± 0.5V
V
(*)
(V)
C
(pF)
L
CC
5.0155.07.01.08.01.08.0
5.0505.58.01.09.01.09.0
T
A
-40 to 85°C -55 to 125°C
Min.Typ. Max.Min.Max. Min. Max.
Unit
ns
Table 8: Capacitive Characteristics
Test ConditionValue
= 25°C
SymbolParameter
T
A
Min.Typ. Max.Min.Max. Min. Max.
C
C
Input Capacitance
IN
Power Dissipation
PD
Capacitance
4101010pF
18pF
(note 1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
-40 to 85°C -55 to 125°C
= CPD x VCC x fIN + ICC/4 (per gate)
CC(opr)
Unit
3/11
Page 4
74VHCT32A
Table 9: Dynamic Switching Characteristics
Test ConditionValue
= 25°C
SymbolParameter
V
V
Dynamic Low
OLP
Voltage Quiet
OLV
Output (note 1, 2)
V
CC
(V)
5.0
T
A
Min.Typ. Max.Min.Max. Min. Max.
0.30.8
-0.8-0.3
Dynamic High
V
IHD
Voltage Input
5.02.0
= 50 pF
C
L
(note 1, 3)
Dynamic Low
V
ILD
Voltage Input
5.00.8
(note 1, 3)
1) Worst case package.
2) Max number of outp ut s defined as (n). Data inpu t s are driven 0V to 3.0V, (n-1) outputs switc hi ng and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (V
), f=1MHz.
(V
IHD
Figure 3: Test Cir cuit
-40 to 85°C -55 to 125°C
ILD
Unit
V
), 0V to thresho l d
CL =15/50pF or equivalent (i ncludes jig an d probe capac i tance)
R
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