The 74VHCT245A is an advanced high-speed
CMOS OCTAL BUS TRANSCEIVER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
This IC is intended for two-way asynchronous
communication between data busses; the
TSSOPSOP
Table 1: Order Codes
PACKAGET & R
SOP74VHCT245AMTR
TSSOP74VHCT245ATTR
direction of data transmission is determined by
DIR input. The enable input G
can be used to
disable the device so that the busses are
effectivel y isolated.
All inputs and outputs are equipped with
protection circuits against static disc harge, giving
them 2KV ESD immunity and transient excess
voltage.
All floating bus terminals during High Z State must
be held HIGH or LOW.
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) Output in OFF State
2) High or Low State. I
Table 5: Recommended Operating Conditions
SymbolParameterValueUnit
V
V
V
V
T
dt/dv
Supply Voltage
CC
DC Input Voltage (DIR, G)
I
DC BUS I/O Voltage (see note 1)
I/O
DC BUS I/O Voltage (see note 2)-0.5 to VCC + 0.5
I/O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
absolute maximum rating must be observed
O
Supply Voltage
CC
Input Voltage
I
BUS I/O Voltage (see note 1)
I/O
BUS I/O Voltage (see note 2)0 to V
I/O
Operating Temperature
op
Input Rise and Fall Time (see note 3) (V
= 5.0 ± 0.5V)
CC
-0.5 to +7.0V
-0.5 to +7.0V
-0.5 to +7.0V
- 20mA
± 20mA
± 25mA
± 75mA
-65 to +150°C
300°C
4.5 to 5.5V
0 to 5.5V
0 to 5.5V
CC
-55 to 125°C
0 to 20ns/V
V
V
1) Output in OFF State
2) High or Low State. I
3) V
from 0.8V to 2V
IN
absolute maximum rating must be observed
O
3/13
Page 4
74VHCT245A
Table 6: DC Specifications
SymbolParameter
V
V
V
+I
I
High Level Input
IH
Voltage
Low Level Input
V
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
High Impedance
OZ
Output Leakage
Current
Input Leakage
I
I
Current
Quiescent Supply
I
CC
Current
Additional Worst
CC
Case Supply
Current
Output Leakage
OPD
Current
4.5 to
4.5 to
Test ConditionValue
= 25°C
T
V
CC
(V)
5.5
5.5
4.5
4.5
4.5
4.5
5.5
0 to
5.5
5.5
=-50 µA
I
O
=-8 mA
I
O
=50 µA
I
O
=8 mA
I
O
= VIH or V
V
I
VO = 0V to 5.5V
= 5.5V or GND
V
I
= VCC or GND
V
I
IL
A
Min.Typ. Max.Min.Max. Min. Max.
222V
0.80.80.8V
4.44.54.44.4
3.943.83.7
0.00.10.10.1
0.360.440.55
±0.25± 2.5± 2.5µA
± 0.1± 1.0± 1.0µA
One Input at 3.4V,
5.5
other input at V
CC
1.351.51.5mA
or GND
= 5.5V
0
V
OUT
0.5 5.0 5.0µA
-40 to 85°C -55 to 125°C
Unit
V
V
44040µA
Table 7: AC Electrical Characteristics (Input t
Test ConditionValue
SymbolParameter
t
Propagation Delay
PLH
t
t
t
t
t
t
OSLH
t
OSHL
(*) Voltage range is 5.0V ± 0.5V
Note 1: Parameter guaranteed by design. t
Time
PHL
Output Enable
PZL
Time
PZH
Output Disable
PLZ
Time
PHZ
Output to Output
Skew Time (note 1)
(*)
(V)
C
(pF)
L
V
CC
5.0154.57.51.08.51.010.0
5.0505.38.71.09.51.011.0
5.015
5.0509.714.81.016.01.017.0
RL = 1KΩ
5.050RL = 1K
5.0501.01.01.0ns
= |t
pLHm
- t
pLHn
soLH
= tf = 3ns)
r
= 25°C
T
A
-40 to 85°C -55 to 125°C
Min.Typ. Max.Min.Max. Min. Max.
9.013.81.015.01.016.0
Ω10.015.41.016.51.017.5ns
|, t
= |t
- t
soHL
pHLm
pHLn
|
Unit
ns
ns
4/13
Page 5
Table 8: Capacitive Characteristics
Test ConditionValue
SymbolParameter
C
C
C
Input Capacitance
IN
Bus Input
I/O
Capacitance
Power Dissipation
PD
Capacitance
(note 1)
74VHCT245A
= 25°C
T
A
Min.Typ. Max.Min.Max. Min. Max.
6101010pF
8pF
18pF
-40 to 85°C -55 to 125°C
Unit
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= CPD x VCC x fIN + ICC/8 (per c ircuit )
CC(opr)
Table 4: DYNAMIC SWITCHING CHARACTERISTICS
Test ConditionValue
= 25°C
SymbolParameter
V
V
Dynamic Low
OLP
Voltage Quiet
OLV
Output (note 1, 2)
V
(V)
5.0
CC
T
A
Min.Typ. Max.Min.Max. Min. Max.
0.60.9
-0.9-0.6
Dynamic High
V
IHD
Voltage Input
5.02.0
= 50 pF
C
L
(note 1, 3)
Dynamic Low
V
ILD
Voltage Input
5.00.8
(note 1, 3)
1) Worst case package.
2) Max number of outp ut s defined as (n). Data inpu t s are driven 0V to 3.0V, (n-1) outputs switc hi ng and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (V
), f=1MHz.
(V
IHD
-40 to 85°C -55 to 125°C
), 0V to thresho l d
ILD
Unit
V
5/13
Page 6
74VHCT245A
Figure 5: Test Circuit
t
, t
PLH
PHL
, t
t
PZL
PLZ
t
, t
PZH
PHZ
TESTSWITCH
Open
V
CC
GND
CL =15/ 50pF or e qui valent (includes jig an d probe capacit ance)
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