The 74VHCT138A is an advanced high-speed
CMOS 3 TO 8 LINE DECODER (INVERTING)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
If the device is enabled, 3 binary select inputs (A,
B, and C) determine which one of the outputs will
go low. When enable input G1 is held low or either
G2A
or G2B is held high, the d ec oding fun ction is
inhibited and all the 8 outputs go to high.
TSSOPSOP
Table 1: Order Codes
PACKAGET & R
SOP74VHCT138AMTR
TSSOP74VHCT138ATTR
The three enable inputs are provided to ease
cascade connection and application of address
decoders for memory systems.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used t o interf ace 5V to 3V s ince al l
inputs are equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static disc harge, giving
them 2KV ESD immunity and transient excess
voltage.
This logi c di agram has not be used to est i m ate propaga tion delays
2/12
Page 3
74VHCT138A
Table 4: Absolute Maximum Ratings
SymbolParameterValueUnit
V
V
V
V
I
I
OK
I
or I
I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) V
CC
2) High or Low State
Table 5: Recommended Operating Conditions
SymbolParameterValueUnit
V
V
V
V
T
dt/dv
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage (see note 1)
O
DC Output Voltage (see note 2)-0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCC or Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
= 0V
Supply Voltage
CC
Input Voltage
I
Output Voltage (see note 1)
O
Output Voltage (see note 2)0 to V
O
Operating Temperature
op
Input Rise and Fall Time (see note 3) (V
= 5.0 ± 0.5V)
CC
-0.5 to +7.0V
-0.5 to +7.0V
-0.5 to +7.0V
- 20mA
± 20mA
± 25mA
± 50mA
-65 to +150°C
300°C
4.5 to 5.5V
0 to 5.5V
0 to 5.5V
CC
-55 to 125°C
0 to 20ns/V
V
V
1) V
= 0V
CC
2) High or Low State
3) V
from 0.8V to 2V
IN
3/12
Page 4
74VHCT138A
Table 6: DC Specifications
SymbolParameter
V
V
V
+I
I
High Level Input
IH
Voltage
Low Level Input
V
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
I
Quiescent Supply
CC
Current
Additional Worst
CC
Case Supply
Current
Output Leakage
OPD
Current
Test ConditionValue
= 25°C
T
V
CC
(V)
4.5 to
5.5
A
Min.Typ. Max.Min.Max. Min. Max.
222V
4.5 to
5.5
4.5
4.5
4.5
4.5
0 to
VI = 5.5V or GND
5.5
V
5.5
I
O
=-8 mA
I
O
=50 µA
I
O
=8 mA
I
O
= VCC or GND
I
4.44.54.44.4
3.943.83.7
0.00.10.10.1
=-50 µA
One Input at 3.4V,
other input at V
5.5
CC
or GND
= 5.5V
0
V
OUT
-40 to 85°C -55 to 125°C
Unit
0.80.80.8V
V
0.360.440.55
V
± 0.1± 1.0± 1.0µA
44040µA
1.351.51.5mA
0.5 5.0 5.0µA
Table 7: AC Electrical Characteristics (Input t
Test ConditionValue
SymbolParameter
t
Propagation Delay
PLH
t
t
t
t
t
(*) Voltage range is 5.0V ± 0.5V
Time
PHL
A, B, C, to Y
Propagation Delay
PLH
Time
PHL
G1 to Y
Propagation Delay
PLH
Time
PHL
G2A
, G2B to Y
V
(V)
5.0
5.0
5.0
5.0
5.0
5.0
C
CC
L
(pF)
(*)
157.610.41.012.01.012.0
(*)
508.111.41.013.01.013.0
(*)
156.69.11.010.51.010.5
(*)
507.110.11.011.51.011.5
(*)
157.09.61.011.01.011.0
(*)
507.510.61.012.01.012.0
Table 8: Capacitive Characteristics
Test ConditionValue
SymbolParameter
C
C
Input Capacitance
IN
Power Dissipation
PD
Capacitance
(note 1)
= tf = 3ns)
r
= 25°C
T
A
-40 to 85°C -55 to 125°C
Min.Typ. Max.Min.Max. Min. Max.
= 25°C
T
A
-40 to 85°C -55 to 125°C
Min.Typ. Max.Min.Max. Min. Max.
6101010pF
36pF
Unit
ns
ns
ns
Unit
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (R ef er to Test Circ ui t). Averag e operating current can be obtained by t he following equation. I
= CPD x VCC x fIN + I
CC(opr)
CC
4/12
Page 5
74VHCT138A
Figure 4: Test Circuit
CL =15/50pF or equivalent (i ncludes jig an d probe capac i tance)
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