The 74VHC244 is an advanced high-speed
CMOS OCTAL BUS BUFFER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
G
output enable governs four BUS BUFFERs.
2
MOS technology.
This device is designed to be used with 3 state
memory address drivers, etc.
TSSOPSOP
Table 1: Order Codes
PACKAGET & R
SOP74VHC244MTR
TSSOP74VHC244TTR
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static disc harge, giving
them 2KV ESD immunity and transient excess
voltage.
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ±
Note 1: Parameter guaranteed by design. t
0.5V
soLH
= |t
pLHm
- t
pLHn
|, t
soHL
= |t
pHLm
- t
pHLn
|
Table 8: Capacitive Characteristics
Test ConditionValue
= 25°C
SymbolParameter
T
A
Min.Typ. Max.Min.Max. Min. Max.
C
C
C
Input Capacitance
IN
Output
OUT
Capacitance
Power Dissipation
PD
Capacitance
4101010pF
6pF
19pF
(note 1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
-40 to 85°C -55 to 125°C
= CPD x VCC x fIN + ICC/8 (per c ircuit )
CC(opr)
Unit
4/12
Page 5
Table 9: Dynamic Switching Characteristics
Test ConditionValue
SymbolParameter
V
V
Dynamic Low
OLP
Voltage Quiet
OLV
Output (note 1, 2)
V
CC
(V)
5.0
T
A
Min.Typ. Max.Min.Max. Min. Max.
0.60.9
-0.9-0.6
-40 to 85°C -55 to 125°C
= 25°C
Dynamic High
V
IHD
Voltage Input
5.03.5V
= 50 pF
C
L
(note 1, 3)
Dynamic Low
V
ILD
Voltage Input
5.01.5V
(note 1, 3)
1) Worst case package.
2) Max number of outp ut s defined as (n). Data inpu t s are driven 0V to 5.0V, (n-1) outputs switc hi ng and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (V
(V
), f=1MHz.
IHD
ILD
Table 10: Test Circuit
74VHC244
Unit
V
), 0V to thresho l d
TESTSWITCH
t
, t
PLH
PHL
, t
t
PZL
PLZ
t
, t
PZH
PHZ
CL =15/ 50pF or e qui valent (includes jig an d probe capacit ance)
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