Page 1
■ HIGHSPEED:t
■ LOW POWER DISSIPATION:
=2 µA (MAX.)at TA=25oC
I
CC
■ HIGHNOISEIMMUNITY:
V
NIH=VNIL
■ POWERDOWNPROTECTIONON INPUTS
■ SYMMETRICALOUTPUTIMPEDANCE:
|=IOL=8 mA(MIN)
|I
OH
■ BALANCEDPROPAGATIONDELAYS:
t
≅ t
PLH
■ OPERATINGVOLTAGERANGE:
V
(OPR)= 2Vto5.5V
CC
■ PINANDFUNCTIONCOMPATIBLEWITH
=28%VCC(MIN.)
PHL
=3.3ns(TYP.)atVCC=5V
PD
74SERIES20
■ IMPROVEDLATCH-UPIMMUNITY
DESCRIPTION
The 74VHC20 is an advanced high-speedCMOS
DUAL 4-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiringC
2
MOStechnology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
74VHC20
DUAL 4-INPUT NAND GATE
PRELIMINARY DATA
M
(Micro Package)
(TSSOPPackage)
ORDERCODES :
74VHC20M 74VHC20T
immunityand stableoutput.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
T
PIN CONNECTION AND IEC LOGICSYMBOLS
June 1999
1/7
Page 2
74VHC20
INPUT EQUIVALENTCIRCUIT
PIN DESCRIPTION
PI N No SYMB OL NAME AND FU NCTIO N
1, 9 1A to 2A Data Inputs
2, 10 1B to 2B Data Inputs
3, 11 N.C. Not Connected
4, 12 1C to 2C Data Inputs
5, 13 1D to 2D Data Inputs
6, 8 1Y to 2Y Data Outputs
7 GND Ground (0V)
14 V
CC
Positive Supply Voltage
TRUTH TABLE
ABCDY
LXXXH
XLXXH
XXLXH
XXXLH
HHHHL
X: ”H” or ”L”
ABSOLUTE MAXIMUM RATINGS
Symb o l Para met er Val u e Uni t
V
V
V
I
I
OK
I
or I
I
CC
T
T
AbsoluteMaximumRatingsarethosevaluesbeyondwhichdamageto thedevicemayoccur.Functionaloperation underthesecondition isnotimplied.
Supply Voltage -0.5 to +7.0 V
CC
DC Input Voltage -0.5 to +7.0 V
I
DC Output Voltage -0.5 to VCC+ 0.5 V
O
DC Input Diode Current - 20 mA
IK
DC Output Diode Current ± 20 mA
DC Output Current ± 25 mA
O
DC VCCor Ground Current
GND
Storage Temperature -65 to +150
stg
Lead Temperature (10 sec) 300
L
50 mA
±
o
C
o
C
RECOMMENDED OPERATINGCONDITIONS
Symb o l Para met er Value Un it
V
V
V
T
dt/dv
1)VINfrom30%to70%of V
Supply Voltage 2.0 to 5.5 V
CC
Input Voltage 0 to 5.5 V
I
Output Voltage 0 to V
O
Operating Temperature -40 to +85
op
(V
CC
CC
=3.3±0.3V)
=5.0±0.5V)
Input Rise and Fall Time (see note 1) (V
CC
CC
0 to 100
0to20
V
o
C
ns/V
ns/V
2/7
Page 3
74VHC20
DC SPECIFICATIONS
Symb o l Para met er Test C o n dit io ns Val u e Uni t
T
V
CC
(V)
High Level Input
V
IH
Voltage
V
Low Level Input
IL
Voltage
V
High Level Output
OH
Voltage
Low Level Output
V
OL
Voltage
Input Leakage Current 0 to 5.5 VI= 5.5V or GND ±0.1 ±1.0 µA
I
I
Quiescent Supply
I
CC
2.0 1.5 1.5
3.0 to 5.5 0.7V
2.0 0.5 0.5
3.0 to 5.5 0.3V
2.0 IO=-50 µA 1.9 2.0 1.9
3.0 I
4.5 I
3.0 I
4.5 I
=-50µA 2.9 3.0 2.9
O
=-50µA 4.4 4.5 4.4
O
=-4 mA 2.58 2.48
O
=-8 mA 3.94 3.8
O
2.0 IO=50 µA 0.0 0.1 0.1
3.0 I
4.5 I
3.0 I
4.5 I
=50µA 0.0 0.1 0.1
O
=50µA 0.0 0.1 0.1
O
=4 mA 0.36 0.44
O
=8 mA 0.36 0.44
O
5.5 VI=VCCorGND 2 20 µA
Min. Typ. Max. Min. Max.
Current
=25oC -40 t o 85oC
A
CC
0.7V
CC
CC
0.3V
CC
V
V
V
V
AC ELECTRICAL CHARACTERISTICS (Input tr=tf=3 ns)
Symbol Parameter Test Condition Value Unit
t
Propagation Delay
PLH
t
Time
PHL
(*) Voltagerangeis 3.3V± 0.3V
(**) Voltagerangeis 5V± 0.5V
V
3.3
3.3
5.0
5.0
CC
(V)
(**)
(**)
C
L
(pF)
(*)
(*)
15 4.6 6.6 1.0 8.0
50 7.1 10.1 1.0 11.5
T
=25oC -40 t o 85oC
A
Min. Typ. Max. Min. Max.
ns
15 3.3 5.0 1.0 6.0
50 4.8 7.0 1.0 8.0
CAPACITIVE CHARACTERISTICS
Symb o l Para met er Test C o n dit io ns Val u e Uni t
=25oC -40 t o 85oC
T
A
Min. Typ. Max. Min. Max.
Input Capacitance 4 10 10
C
IN
Power Dissipation
C
PD
19 pF
Capacitance (note 1)
1)CPDisdefined asthevalue oftheIC’sinternal equivalentcapacitance whichis calculated fromtheoperatingcurrent consumptionwithout load.(Referto
TestCircuit).Average operatingcurrent canbeobtainedbythefollowingequation.I
(opr)= CPD• VCC• fIN+ICC/4(perGate)
CC
pF
3/7
Page 4
74VHC20
TESTCIRCUIT
CL= 15/50 pF orequ ivalent (includes jigand probe capacitance)
R
ofpulse generator (typically50Ω)
T=ZOUT
WAVEFORM:PROPAGATIONDELAYS
(f=1MHz;50% duty cycle)
4/7
Page 5
SO-14 MECHANICALDATA
74VHC20
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45 (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026
S 8 (max.)
mm inch
P013G
5/7
Page 6
74VHC20
TSSOP14 MECHANICAL DATA
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.1 0.433
A1 0.05 0.10 0.15 0.002 0.004 0.006
A2 0.85 0.9 0.95 0.335 0.354 0.374
b 0.19 0.30 0.0075 0.0118
c 0.09 0.20 0.0035 0.0079
D 4.9 5 5.1 0.193 0.197 0.201
E 6.25 6.4 6.5 0.246 0.252 0.256
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0
o
o
4
o
8
o
0
o
4
L 0.50 0.60 0.70 0.020 0.024 0.028
o
8
A
PIN 1 IDENTIFICATION
6/7
A2
A1
b
e
c
K
L
E
D
E1
1
Page 7
74VHC20
Information furnished is believed to beaccurate and reliable. However, STMicroelectronics assumes no responsibility forthe consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject tochange without notice. Thispublication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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