Page 1
74V2T125
DUAL BUS BUFFER (3-STATE)
■ HIGH SPEED: t
■ LOW POWER DISSIPATION:
=1µA(MAX.) atTA=25°C
I
CC
■ COMPATIBLE WITHTTL OUTPUTS:
V
=2V(MIN),VIL=0.8V(MAX)
IH
■ POWER DOWN PROT ECTION ON INPUTS
= 3.8ns (TYP.) at VCC=5V
PD
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
|=IOL=8mA(MIN)
OH
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
PHL
■ OPERATING VOLTAGE RANG E:
(OPR) = 4.5V to 5.5V
V
CC
■ IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2T125 is an advanced high-speed CMOS
DUAL BUS BUFFER fabricated with sub-micron
silicon gate and double-layer me tal wiring C
2
MOS
technology.
3-STATE control input nG
has to be set H IGH to
place the out put into the high impedance state.
SOT23-8L
ORDER CODES
PACKAGE T & R
SOT23-8L 74V2T125STR
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 3V to 5V systems
and it is ideal for portable ap plicat ions like
personal digital assistant, camcorder and all
battery-powered equipment.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/8June 2003
Page 2
74V2T125
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN N° SYMBOL NAME AND FUNCTION
1, 7 1G
2, 5 1A, 2A Data Inputs
3, 6 2Y, 1Y Data Outputs
4 GND Ground (0V)
8
TRUTH TABLE
V
,2G Output Enable Inputs
CC
Positive Supply Voltage
AG
Y
XHZ
LLL
HLH
X: "H" or "L"
Z: HighImpedance
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
V
I
I
OK
I
or I
I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage -0.5 to VCC+ 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7.0 V
-0.5 to +7.0 V
V
− 20 mA
− 20 mA
± 25 mA
± 50 mA
-65 to +150 °C
260 °C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
T
dt/dv
1) VINfrom0.8V to 2V
Supply Voltage
CC
Input Voltage
I
Output Voltage 0 to V
O
Operating Temperature
op
Input Rise and Fall Time (note 1) (V
=5.0±0.5V)
CC
4.5 to 5.5 V
0 to 5.5 V
CC
-55 to 125 °C
0 to 20 ns/V
2/8
V
Page 3
DC SPECIFICATION
Symbol Parameter
V
V
V
I
+
High Level Input
IH
Voltage
V
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
High Impedance
I
OZ
Output Leakage
Current
Input Leakage
I
I
Current
Power downOutput
OPD
Leakage Current
Quiescent Supply
I
CC
Current
I
Additional Worst
CC
Case Supply
Current
Test Condition Value
= 25°C
T
V
CC
(V)
4.5to
5.5
A
Min. Typ. Max. Min. Max. Min. Max.
0.8 0.8 0.8 V
4.5to
5.5
4.5
4.5
4.5
4.5
5.5
0to
5.5
0
5.5
IO=-50 µA
=-8 mA
I
O
IO=50 µA
=8 mA
I
O
I=VIH
or V
IL
V
VO= 5.5 or GND
V
= 5.5V or GND
I
= 5.5
V
O
V
I=VCC
or GND
4.4 4.5 4.4 4.4
3.94 3.8 3.7
0.0 0.1 0.1 0.1
One Input at 3.4V,
other input at V
5.5
CC
or GND
74V2T125
-40 to 85°C -55 to 125°C
2.0 2.0 2.0
0.36 0.44 0.55
±0.25 ± 2.5 ± 5 µA
± 0.1 ± 1 ± 1 µA
0.5 5 10 µA
11020µA
1.35 1.5 1.5 mA
Unit
V
V
V
AC ELECTRICAL CHARACTERISTICS (Input t
Test Condition Value
Symbol Parameter
t
t
t
t
t
t
(*) Voltage range is5.0V ± 0.5V
Propagation Delay
PLH
Time
PHL
Output Disable
PLZ
Time
PHZ
Output Enable
PZL
Time
PZH
V
(V)
5.0
5.0
5.0
5.0
5.0
5.0
C
CC
L
(pF)
(*)
15 3.8 5.5 1.0 6.5 1.0 7.5
(*)
50 4.3 6.5 1.0 7.5 1.0 8.5
(*)
(*)
(*)
(*)
15
50
15
50
R
L
R
L
R
L
R
L
=1KΩ
=1KΩ
=1KΩ
=1KΩ
=3ns)
r=tf
= 25°C
T
A
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
3.6 5.0 1.0 6.0 1.0 7.0
5.1 7.0 1.0 8.0 1.0 9.0
3.7 5.9 1.0 7.0 1.0 8.0
4.1 6.5 1.0 7.5 1.0 8.5
Unit
ns
3/8
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74V2T125
CAPACITIVE CHARACTERISTICS
Test Condition Value
= 25°C
Symbol Parameter
T
A
Min. Typ. Max. Min. Max. Min. Max.
C
C
C
Input Capacitance
IN
Output
OUT
Capacitance
Power Dissipation
PD
Capacitance
410 10 10pF
6pF
14 pF
(note 1)
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average current can be obtained by the following equation. I
CC(opr)=CPDxVCCxfIN+ICC
TEST CIRCUIT TEST CIRCUIT
-40 to 85°C -55 to 125°C
/2
Unit
TEST SWITCH
t
PLH,tPHL
t
PZL,tPLZ
t
PZH,tPHZ
CL=15/50pF or equivalent (includes jig and probe capacitance)
R1 = 1KΩ or equivalent
R
T=ZOUT
of pulse generator (typically 50Ω)
4/8
Open
V
CC
GND
Page 5
WAVEFORM 1 : PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
74V2T125
5/8
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74V2T125
SOT23-8L MECHANICAL DATA
mm. mils
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 0.90 1.45 35.4 57.1
A1 0.00 0.15 0.0 5.9
A2 0.90 1.30 35.4 51.2
b 0.22 0.38 8.6 14.9
C 0.09 0.20 3.5 7.8
D 2.80 3.00 110.2 118.1
E 2.60 3.00 102.3 118.1
E1 1.50 1.75 59.0 68.8
e0.65 25.6
e1 1.95 76.7
L 0.35 0.55 13.7 21.6
6/8
Page 7
Tape & Reel SOT23-xL MECHANICAL DATA
74V2T125
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 180 7.086
C 12.8 13.0 13.2 0.504 0.512 0.519
D 20.2 0.795
N 60 2.362
T 14.4 0.567
Ao 3.13 3.23 3.33 0.123 0.127 0.131
Bo 3.07 3.17 3.27 0.120 0.124 0.128
Ko 1.27 1.37 1.47 0.050 0.054 0.0.58
Po 3.9 4.0 4.1 0.153 0.157 0.161
P 3.9 4.0 4.1 0.153 0.157 0.161
mm. inch
7/8
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74V2T125
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use o f suc h inf ormat ion n or f or an y infr ingeme nt of paten ts or oth er ri gh ts of third part ies whic h may resul t f rom
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
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systems without express written approval of STMicroelectronics.
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