Datasheet 74LVT273DB, 74LVT273D, 74LVT273PW Datasheet (Philips)

INTEGRATED CIRCUITS

74LVT273

3.3V Octal D flip-flop

Product specification
Supersedes data of 1994 May 11
IC23 Data Handbook

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1998 Feb 19

Philips Semiconductors Product specification

74L VT2733.3V Octal D flip-flop

FEA TURES

•Eight edge-triggered D-type flip-flops

•Buffered common clock

•Buffered asynchronous Master Reset

•Output capability: +64mA/–32mA

•TTL input and output switching levels

•Input and output interface capability to systems at 5V supply

•Bus-hold data inputs eliminate the need for external pull-up

resistors to hold unused inputs

•Power-up reset

•Live insertion/extraction permitted

•No bus current loading when output is tied to 5V bus

•Latchup protection exceeds 500 mA per JEDEC Std 17

•ESD protection exceeds 2000V per Mil Std 883 Method 3015 and

200V per Machine Model.

QUICK REFERENCE DATA

SYMBOL PARAMETER

t

PLH

t

PHL

C

IN

Propagation delay
CP to Qn

CL = 50pF; VCC = 3.3V

Input capacitance VI = 0V or 3.0V 4 pF

DESCRIPTION

The LVT273 is a high-performance BiCMOS product designed for
V

operation at 3.3V .

CC

This device has eight edge-triggered D-type flip-flops with individual
D inputs and Q outputs. The common buffered Clock (CP) and
Master Reset (MR
simultaneously .

The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.

All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR
applications where the true output only is required and the CP and
MR

are common elements.

CONDITIONS

T

= 25°C; GND = 0V

amb

) inputs load and reset (clear) all flip-flops

input. The device is useful for

TYPICAL UNIT

3.5

3.5

ns

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

20-Pin Plastic SOL –40°C to +85°C 74LVT273 D 74LVT273 D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74LVT273 DB 74LVT273 DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +85°C 74LVT273 PW 74LVT273PW DH SOT360-1

PIN CONFIGURATION

1

MR

2

Q0

3

D0

4

D1

5

Q1

6

Q2

7

D2

8

D3

9

Q3 Q4

10 11

GND

SV00017

20

V

CC

Q7

19

D7

18

D6

17

Q6

16

Q5

15

D5

14

D4

13
12

CP

LOGIC SYMBOL

3 4 7 8 13 14 1817

D0 D1 D2 D3 D4 D5 D6 D7

CP

111MR

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

256912151619

SV00018

1998 Feb 19 853-1740 18985

2

Philips Semiconductors Product specification

OPERATING

74LVT2733.3V Octal D flip-flop

LOGIC SYMBOL (IEEE/IEC)

1

11

13
14
17
18

R

C1

3

1D

4
7
8

PIN DESCRIPTION

PIN NUMBER SYMBOL NAME AND FUNCTION

11 CP Clock pulse input (active rising edge)
3, 4, 7, 8, 13, 14, 17, 18 D0 – D7 Data inputs
2, 5, 6, 9, 12, 15, 16, 19 Q0 – Q7 Data outputs

1 MR Master Reset input (active-Low)
10 GND Ground (0V)
20 V

SV00019

FUNCTION TABLE

INPUTS OUTPUTS

MR CP D

Q0 – Q7

n

L X X L Reset (clear)

2
5
6

9
12
15
16
19

H ↑ h H Load “1”
H ↑ l L Load “0”
H L X Q

0

H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High

clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High

clock transition
X = Don’t care
↑ = Low-to-High clock transition

= Output as it was

Q

0

CC

Positive supply voltage

OPERATING

MODE

Retain state

LOGIC DIAGRAM

D0

11

CP

1

MR

D1

3

Q

D

CP

R

D

Q0

4

D

CP

R

D

2

D2

7

Q

Q1

D

CP

R

D

5

D3

8

Q

Q2

D

CP

R

D

6

D4

13

Q

Q3

D

CP

R

D

9

D5

14

Q

Q4

D

CP

R

D

12

D6

17

Q

Q5

D

CP

R

D

15

D7

18

Q

16

Q6

D

CP

R

D

Q

19

Q7

SV00020

1998 Feb 19

3

Philips Semiconductors Product specification

I

DC output current

mA

SYMBOL

PARAMETER

UNIT

74LVT2733.3V Octal D flip-flop

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

DC supply voltage –0.5 to +4.6 V
DC input diode current VI < 0 –50 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

–0.5 to +7.0 V

output in Off or High state –0.5 to +7.0 V

Output in Low state 128

OUT

T

stg

p

Output in High State –64

Storage temperature range –65 to 150 °C

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

LIMITS

MIN MAX

V

CC

V
V
V
I

OH

I

OL

∆t/∆v Input transition rise or fall rate; Outputs enabled 10 ns/V

T

amb

DC supply voltage 2.7 3.6 V
Input voltage 0 5.5 V

I

High-level input voltage 2.0 V

IH

Low-level Input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 64 mA

Operating free-air temperature range –40 +85 °C

1998 Feb 19

4

Philips Semiconductors Product specification

Data pins

3

5

Quiescent supply current

74LVT2733.3V Octal D flip-flop

DC ELECTRICAL CHARACTERISTICS

LIMITS

SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT

1

MAX

0.13 0.55 V

0.1 1
–1 -5

0.1 0.2 mA

µA

µA

V

Input clamp voltage VCC = 2.7V; IIK = –18mA –0.9 –1.2 V

IK

VCC = 2.7 to 3.6V; IOH = –100µA VCC-0.2 VCC–0.1

V

High-level output voltage VCC = 2.7V; IOH = –8mA 2.4 2.5 V

OH

VCC = 3.0V; IOH = –32mA 2.0 2.2
VCC = 2.7V; IOL = 100µA 0.1 0.2
VCC = 2.7V; IOL = 24mA 0.3 0.5

V

Low-level output voltage VCC = 3.0V; IOL = 16mA 0.25 0.4 V

OL

VCC = 3.0V; IOL = 32mA 0.3 0.5
VCC = 3.0V; IOL = 64mA 0.4 0.55

V

RST

Power-up output low voltage4VCC = 3.6V; IO = 1mA; VI = GND or V

CC

VCC = 0 or 3.6V; VI = 5.5V 1 10
VCC = 3.6V; VI = VCC or GND Control pins ±0.1 ±1

I

Input leakage current

I

OFF

I

Output off current VCC = 0V; VI or VO = 0 to 4.5V 1 ±100 µA

VCC = 3.6V; VI = V
VCC = 3.6V; VI = 0

CC

p

VCC = 3V; VI = 0.8V 75 150

I

HOLD

Bus Hold current A inputs

VCC = 3V; VI = 2.0V –75 –150
VCC = 0V to 3.6V; VCC = 3.6V ±500

I

I

CCH

I

CCL

∆I

Current into an output in the

EX

High state when VO > V

Additional supply current per

CC

input pin

2

pp

CC

VO = 5.5V; VCC = 3.0V 60 125 µA

VCC = 3.6V; Outputs High, VI = GND or V
VCC = 3.6V; Outputs Low, VI = GND or V
VCC = 3V to 3.6V; One input at V

Other inputs at VCC or GND

CC

-0.6V,

I

0 0.13 0.19

CC,

O =

I

0 3 12 mA

CC,

O =

NOTES:

1. All typical values are at V

2. This is the increase in supply current for each input at the specified voltage level other than V

3. Unused pins at V

4. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power .

CC

CC

or GND.

= 3.3V and T

amb

= 25°C.

or GND

CC

5. This is the bus hold overdrive current required to force the input to the opposite logic state.

MIN TYP

AC CHARACTERISTICS

GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; T

SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V UNIT

f

MAX

t

PLH

t

PHL

t

PHL

NOTE:

1. All typical values are at V

1998 Feb 19

= –40°C to +85°C.

amb

LIMITS

MIN TYP

1

MAX MAX

Maximum clock frequency 1 150 MHz
Propagation delay

CP to Qn
Propagation delay

MR to Qn

= 3.3V and T

CC

amb

1

2 1.3 3.2 6.2 6.2 ns

= 25°C.

1.7

1.9

3.5

3.5

5.5

5.5

6.3

5.9

5

ns

Philips Semiconductors Product specification

74LVT2733.3V Octal D flip-flop

AC SETUP REQUIREMENTS

GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω, T

SYMBOL PARAMETER WAVEFORM VCC = +3.3 ± 0.3V VCC = 2.7V UNIT

ts(H)

ts(L)

th(H)
th(L)

tw(H)

tw(L)

Setup time, High or Low
Dn to CP

Hold time, High or Low
Dn to CP

Clock pulse width
High or Low

tw(L) Master Reset pulse width, Low 2 3.3 1.5 3.3 ns

t

REC

Recovery time
MR to CP

= –40°C to +85°C.

amb

LIMITS

MIN TYP MIN

3

3

1

2.3

2.3
0

0

3.3

3.3

1.0

1.0

–0.6
–0.6

1.5

1.5

2.7

2.7

3.3

3.3

ns

0
0

ns

ns

2 2.7 1.0 3.2 ns

AC WAVEFORMS

VM = 1.5V, VIN = GND to 2.7V

1/f

MAX

CP

Qn

tw(H) tw(L)

t

PHL

1.5V1.5V

1.5V 1.5V

Waveform 1. Propagation Delay, Clock Input to Output,

Clock Pulse Width, and Maximum Clock Frequency

MR

1.5V1.5V

tw(L)

CP

t

PHL

Qn

1.5V

t

REC

1.5V

1.5V

t

PLH

2.7V

0V

V

V

OL

SV00021

2.7V

0V

2.7V

0V

V

OH

V

2.7V

Dn

CP

OH

1.5V 1.5V 1.5V 1.5V

ts(H)

(H)

t

h

t

(L)

s

0V

(L)

t

h

2.7V

1.5V1.5V
0V

NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.

SV00108

Waveform 3. Data Setup and Hold Times

OL

Waveform 2. Master Reset Pulse Width, Master Reset to
Output Delay and Master Reset to Clock Recovery Time

1998 Feb 19

SV00107

6

Philips Semiconductors Product specification

74LVT2733.3V Octal D flip-flop

TEST CIRCUIT AND WAVEFORMS

V

CC

PULSE

GENERATOR

V

IN

D.U.T.

R

T

V

OUT

C

L

R

L

Test Circuit for Outputs

DEFINITIONS

RL = Load resistor; see AC CHARACTERISTICS for value.

= Load capacitance includes jig and probe capacitance;

C

L

see AC CHARACTERISTICS for value.

R

= Termination resistance should be equal to Z

T

pulse generators.

OUT

of

90%

NEGATIVE
PULSE

POSITIVE
PULSE

10%

t

W

V

M

10% 10%

t

(tF)

THL

t

(tR)t

TLH

90% 90%

V

M

t

W

V

M

V

M

90%

10%

t

TLH

THL

AMP (V)

0V

(tR)

(tF)

AMP (V)

0V

VM = 1.5V

Input Pulse Definition

INPUT PULSE REQUIREMENTS

FAMILY

Amplitude Rep. Rate t

t

W

t

R

74LVT 2.7V ≤10MHz 500ns ≤2.5ns ≤2.5ns

SV00022

F

1998 Feb 19

7

Philips Semiconductors Product specification

74LVT2733.3V Octal D flip-flop

SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

1998 Feb 19

8

Philips Semiconductors Product specification

74LVT2733.3V Octal D flip-flop

SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1

1998 Feb 19

9

Philips Semiconductors Product specification

74LVT2733.3V Octal D flip-flop

TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1

1998 Feb 19

10

Philips Semiconductors Product specification

74LVT2733.3V Octal D flip-flop

Data sheet status

Data sheet
status

Objective
specification

Preliminary
specification

Product
specification

Product
status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.

[1]

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

 Copyright Philips Electronics North America Corporation 1998

All rights reserved. Printed in U.S.A.

print code Date of release: 05-96
Document order number: 9397-750-03534

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