Datasheet 74lvt10 DATASHEETS (Philips)

INTEGRATED CIRCUITS

74LVT10

3.3V Triple 3-input NAND gate

Product specification 1996 May 29
IC24 Data Handbook

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Philips Semiconductors Product specification

INPUTS

OUTPUTS

74L VT103.3V Triple 3-input NAND gate

QUICK REFERENCE DATA

CONDITIONS

SYMBOL PARAMETER

T

Propagation

IN

delay
An, Bn, Cn
to Yn

Input
capacitance

Total supply
current

CL = 50pF;
VCC = 3.3V

VI = 0V or 3.0V 2 pF

Outputs Low;
V

CC

t

PLH

t

PHL

C

I

CCL

PIN CONFIGURATION

1

A0

2

B0
A1

3

B1

4

C1

5

1

6

Y

GND

PIN DESCRIPTION

PIN

NUMBER

1, 2, 3, 4, 5,

9, 10, 11, 13

6, 8, 12 Yn Data outputs

7 GND Ground (0V)

14 V

SYMBOL NAME AND FUNCTION

An, Bn,

Cn

Data inputs

Positive supply voltage

CC

LOGIC SYMBOL

1 2 13 3 4 5 9 10

A0 B0 C0 B1 C1 A2 B2A1

Y0Y1Y2

VCC = Pin 14
GND = Pin 7

12 6 8

= 25°C;

amb

GND = 0V

= 3.6V

SA00346

LOGIC SYMBOL (IEEE/IEC)

TYPICAL UNIT

3.8

3.3

ns

1 mA

14

V

CC

C0

13

Y

12

0

C2

11

B2

10

A2

9

Y2

87

LOGIC DIAGRAM

VCC = Pin 14
GND = Pin 7

1

2

13

3

4

5

9

10

11

A0
B0
C0

A1
B1
C1

A2
B2
C2

&

12

6

8

SV00059

1
2

13

3
4
5

9

10
11

12

Y0

6

Y1

8

Y2

SA00348

FUNCTION TABLE

Dna Dnb Dnc Qn

L L L H
L L H H

11

C2

SA00347

L H L H

L H H H
H L L H
H L H H
H H L H
H H H L

NOTES:

H = High voltage level
L = Low voltage level

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

14-Pin Plastic SO –40°C to +85°C 74LVT10 D 74LVT10 D SOT108-1
14-Pin Plastic SSOP –40°C to +85°C 74LVT10 DB 74LVT10 DB SOT337-1
14-Pin Plastic TSSOP –40°C to +85°C 74LVT10 PW 74LVT10PW DH SOT402-1

1996 May 10 853–1832 16801

2

Philips Semiconductors Product specification

I

DC output current

mA

SYMBOL

PARAMETER

UNIT

74LVT103.3V Triple 3-input NAND gate

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

OUT

T

stg

DC supply voltage –0.5 to +4.6 V
DC input diode current VI < 0 –50 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage

p

Storage temperature range –65 to 150 °C

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

–0.5 to +7.0 V

Output in Off or High state –0.5 to +7.0 V

Output in High state –32

Output in Low state 64

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

LIMITS

MIN MAX

V

CC

V
V
V
I

OH

I

OL

∆t/∆v Input transition rise or fall rate; Outputs enabled 10 ns/V
T

amb

DC supply voltage 2.7 3.6 V
Input voltage 0 5.5 V

I

High-level input voltage 2.0 V

IH

Low-level Input voltage 0.8 V

IL

High-level output current –20 mA
Low-level output current 32 mA

Operating free-air temperature range –40 +85 °C

1996 May 10

3

Philips Semiconductors Product specification

IIInput leakage current

A

Quiescent supply current

mA

74LVT103.3V Triple 3-input NAND gate

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions
Voltages are referenced to GND (ground = 0V)

LIMITS

SYMBOL

V

IK

V

OH

V

OL

Input clamp voltage VCC = 2.7V; IIK = –18mA –1.2 V

High-level output voltage

Low-level output voltage

p

I

OFF

I

CCH

I

CCL

∆I

CC

C

I

Output off current VCC = 0V; VI or VO = 0 to 4.5V 1 ±100 µA

Additional supply current per input pin
Input capacitance VI = 3V or 0 2 pF

NOTES:

1. All typical values are at V

2. This is the increase in supply current for each input at the specificed voltage level other than V

PARAMETER

pp

= 3.3V and T

CC

amb

2

= 25°C.

TEST CONDITIONS Temp = -40°C to +85°C UNIT

MIN TYP1MAX

VCC = 2.7 to 3.6V; IOH = –100µA VCC–0.2 V

CC

VCC = 2.7V; IOH = –6mA 2.4 2.5
VCC = 3.0V; IOH = –20mA 2.0 2.3
VCC = 2.7V; IOL = 100µA 0.05 0.2
VCC = 2.7V; IOL = 24mA 0.3 0.5
VCC = 3.0V; IOL = 32mA 0.35 0.5
VCC = 0 or 3.6V; VI = 5.5V 0.1 10
VCC = 3.6V; VI = VCC or GND 0.01 ±1

VCC = 3.6V; Outputs High, VI = GND or

CC,

I

O =

0

V
VCC = 3.6V; Outputs Low, VI = GND or V

I

0

O =

VCC = 3V to 3.6V; One input at VCC–0.6V,
Other inputs at VCC or GND

CC

CC,

or GND.

0.001 0.02

1 2

0.1 0.2 mA

V

V

µ

AC CHARACTERISTICS

GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω; T

SYMBOL PARAMETER WAVEFORM VCC = 3.3V ± 0.3V VCC = 2.7V UNIT

t

PLH

t

PHL

Propagation delay
An, Bn, Cn to Yn

NOTE:

1. All typical values are at V

= 3.3V and T

CC

amb

= –40°C to +85°C.

amb

= 25°C.

LIMITS

3.8

3.3

1

MAX MAX

5.2

4.4

6.2

4.4

MIN TYP

1

1.0

1.0

AC WAVEFORMS

VM = 1.5V, VIN = GND to 2.7V

Dna, Dnb, Dnc

Qn

Waveform 1. Propagation Delay for Inverting Outputs

V

M

t

PHL

V

M

t

PLH

V

M

V

M

SF00064

ns

1996 May 10

4

Philips Semiconductors Product specification

74LVT103.3V Triple 3-input NAND gate

TEST CIRCUIT AND WAVEFORMS

V

CC

PULSE

GENERATOR

V

IN

D.U.T.

R

T

V

OUT

C

L

R

L

Test Circuit for Outputs

DEFINITIONS

RL = Load resistor; see AC CHARACTERISTICS for value.

= Load capacitance includes jig and probe capacitance;

C

L

see AC CHARACTERISTICS for value.

R

= Termination resistance should be equal to Z

T

pulse generators.

OUT

of

90%

NEGATIVE
PULSE

POSITIVE
PULSE

10%

t

W

V

M

10% 10%

t

(tF)

THL

t

(tR)t

TLH

90% 90%

V

M

t

W

V

M

V

M

90%

10%

t

TLH

THL

AMP (V)

0V

(tR)

(tF)

AMP (V)

0V

VM = 1.5V

Input Pulse Definition

INPUT PULSE REQUIREMENTS

FAMILY

Amplitude Rep. Rate t

t

W

t

R

74LVT 2.7V ≤10MHz 500ns ≤2.5ns ≤2.5ns

SV00022

F

1996 May 10

5

Philips Semiconductors Product specification

74LVT103.3V Triple 3-input NAND gate

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

1995 May 08

6

Philips Semiconductors Product specification

74LVT103.3V Triple 3-input NAND gate

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1

1995 May 08

7

Philips Semiconductors Product specification

74LVT103.3V Triple 3-input NAND gate

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

1995 May 08

8

Philips Semiconductors Product specification

74LVT103.3V Triple 3-input NAND gate

NOTES

1995 May 08

9

Philips Semiconductors Product specification

74LVT103.3V Triple input NAND gate

DEFINITIONS

Data Sheet Identification Product Status Definition

Objective Specification

Preliminary Specification

Product Specification

Formative or in Design

Preproduction Product

Full Production

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.

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Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected

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Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.

Philips Semiconductors and Philips Electronics North America Corporation

register eligible circuits under the Semiconductor Chip Protection Act.

 Copyright Philips Electronics North America Corporation 1995

All rights reserved. Printed in U.S.A.

(print code) Date of release: July 1994
Document order number: 9397-750-04844