Product specification
Supersedes data of February 1996
IC24 Data Handbook
1997 Mar 18
Page 2
Philips SemiconductorsProduct specification
74L VC86Quad 2-input EXCLUSIVE-OR gate
FEA TURES
•Wide supply voltage range of 1.2 to 3.6 V
•In accordance with JEDEC standard no. 8-1A.
•Inputs accept voltages up to 5.5 V
•CMOS low power consumption
•Direct interface with TTL levels
DESCRIPTION
The 74LVC86 is a high-performance, low-power, low-voltage Si-gate
CMOS device that is pin and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
The 74LVC86 provides the 2-input EXCLUSIVE-OR function.
QUICK REFERENCE DATA
GND = 0 V; T
= 25°C; tr = t
amb
SYMBOL
t
PHL
t
PLH
C
I
C
PD
NOTE:
is used to determine the dynamic power dissipation (PD in µW)
1. C
PD
= CPD × V
P
D
= input frequency in MHz; CL = output load capacity in pF;
f
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
× V
Σ (C
L
2
× fi Σ (CL × V
CC
2
× fo) = sum of the outputs.
CC
≤ 2.5 ns
f
PARAMETERCONDITIONSTYPICALUNIT
Propagation delay
nA, nB to nY
CL = 15 pF;
= 3.3 V
V
CC
3.7ns
Input capacitance5.0pF
Power dissipation capacitance per gateVCC = 3.3 V, VI = GND to V
2
× fo) where:
CC
CC
1
55pF
ORDERING INFORMATION
PACKAGESTEMPERATURE RANGE OUTSIDE NORTH AMERICANORTH AMERICAPKG. DWG. #
14-Pin Plastic DIL–40°C to +85°C74LVC86 N74LVC86 NSOT27-1
14-Pin Plastic SO–40°C to +85°C74LVC86 D74LVC86 DSOT108-1
14-Pin Plastic SSOP Type II–40°C to +85°C74LVC86 DB74LVC86 DBSOT337-1
14-Pin Plastic TSSOP Type I–40°C to +85°C74LVC86 PW74LVC86PW DHSOT402-1
PIN CONFIGURATION
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
GND
7
PIN DESCRIPTION
PIN
NUMBER
1, 4, 9, 121A – 4AData inputs
2, 5, 10, 131B – 4BData inputs
3, 6, 8, 111Y – 4YData outputs
7GNDGround (0 V)
14V
SYMBOLFUNCTION
Positive supply voltage
CC
LOGIC SYMBOL (IEEE/IEC)
14
V
CC
13
4B
12
4A
11
4Y
10
3B
9
3A
3Y
8
SV00481
1
2
4
5
9
10
12
13
=1
=1
=1
=1
3
6
8
11
SV00479
1997 Mar 18853–1946 17864
2
Page 3
Philips SemiconductorsProduct specification
SYMBOL
PARAMETER
CONDITIONS
UNIT
mW
Quad 2-input EXCLUSIVE-OR gate
LOGIC SYMBOL
1A
1
1B
2
2A
4
2B
5
3A
9
3B
10
4A
12
4B
13
LOGIC DIAGRAM (ONE GATE)
A
B
RECOMMENDED OPERATING CONDITIONS
V
V
V
T
V
V
amb
tr, t
DC supply voltage (for max. speed performance)2.73.6V
CC
DC supply voltage (for low-voltage applications)1.23.6V
CC
DC input voltage range05.5V
I
DC input voltage range for I/Os0V
I/O
DC output voltage range0V
O
Operating free-air temperature range–40+85°C
Input rise and fall times
f
1Y
3
2Y
6
3Y
8
4Y
11
Y
SV00480
SV00478
FUNCTION TABLE
INPUTSOUTPUTS
nAnBnY
LLL
LHH
HLH
HHL
NOTES:
H = HIGH voltage level
L =LOW voltage level
VCC = 1.2 to 2.7V
= 2.7 to 3.6V
V
CC
LIMITS
MINMAX
CC
CC
0
0
20
10
74LVC86
V
V
ns/V
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
V
CC
I
IK
V
I
V
I/O
I
OK
V
OUT
I
OUT
I
, I
GND
CC
T
stg
DC supply voltage–0.5 to +6.5V
DC input diode currentVIt 0–50mA
DC input voltageNote 2–0.5 to +5.5V
DC input voltage range for I/Os–0.5 to VCC +0.5V
DC output diode currentV
DC output voltageNote 2–0.5 to VCC +0.5V
DC output source or sink currentVO = 0 to V
DC VCC or GND current"100mA
Storage temperature range–60 to +150°C
PARAMETERCONDITIONSRATINGUNIT
uVCC or VO t 0"50mA
O
CC
"50mA
Power dissipation per package
P
TOT
– plastic mini-pack (SO)above +70°C derate linearly with 8 mW/K500
– plastic shrink mini-pack (SSOP and TSSOP)above +60°C derate linearly with 5.5 mW/K500
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1997 Mar 18
3
Page 4
Philips SemiconductorsProduct specification
VIHHIGH level Input voltage
V
VILLOW level Input voltage
V
VOHHIGH level output voltage
V
IIInput leakage current
V
V
GND
Not for I/O pins
"0.1
"5µA
Quad 2-input EXCLUSIVE-OR gate
74LVC86
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. V oltages are referenced to GND (ground = 0V).
LIMITS
SYMBOLPARAMETERTEST CONDITIONSTemp = -40°C to +85°CUNIT
MINTYP1MAX
V
LOW level output voltage
OL
p
I
IHZ/IILZ
I
OZ
I
CC
∆I
Input current for common I/O pinsVCC = 3.6V; VI = VCC or GND"0.1"15µA
3-State output OFF-state currentVCC = 3.6V; VI = VIH or VIL; VO = VCC or GND0.1"10µA
Quiescent supply currentVCC = 3.6V; VI = VCC or GND; IO = 00.120µA
Additional quiescent supply current per
CC
input pin
NOTE:
1. All typical values are at V
p
p
p
= 3.3V and T
CC
amb
VCC = 1.2VV
VCC = 2.7 to 3.6V2.0
VCC = 1.2VGND
VCC = 2.7 to 3.6V0.8
VCC = 2.7V; VI = VIH or VIL; IO = –12mAVCC*0.5
VCC = 3.0V; VI = VIH or VIL; IO = –100µAVCC*0.2V
VCC = 3.0V; VI = VIH or V
VCC = 3.0V; VI = VIH or V
IO = –12mAVCC*0.6
IL;
IO = –24mAVCC*1.0
IL;
VCC = 2.7V; VI = VIH or VIL; IO = 12mA0.40
VCC = 3.0V; VI = VIH or VIL; IO = 100µAGND0.20
VCC = 3.0V; VI = VIH or V
;
= 3.6V;
CC
= 5.5V or
I
IO = 24mA0.55
IL;
p
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 05500µA
= 25°C.
CC
CC
V
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF; RL = 500; T
SYMBOLPARAMETERWAVEFORM
t
/
PHL
t
PLH
Propagation delay
nA, nB to nY
Figures 1, 21.54.06.51.54.57.020ns
NOTE:
1. These typical values are at V
= 3.3V and T
CC
amb
= –40C to +85C
amb
MINTYP1MAXMINTYP
= 25°C.
AC WAVEFORMS
VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5 at VCC < 2.7 V; VOL and V
are the typical output voltage drop that occur with the output load.
V
I
nA, nB INPUT
GND
V
OH
nY OUTPUT
V
OL
Figure 1. Input (nA, nB) to output (nY) propagation delays
SO14: plastic small outline package; 14 leads; body width 3.9 mmSOT108-1
1997 Mar 18
6
Page 7
Philips SemiconductorsProduct specification
74LVC86Quad 2-input EXCLUSIVE-OR gate
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mmSOT337-1
1997 Mar 18
7
Page 8
Philips SemiconductorsProduct specification
74LVC86Quad 2-input EXCLUSIVE-OR gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mmSOT402-1
1997 Mar 18
8
Page 9
Philips SemiconductorsProduct specification
74LVC86Quad 2-input EXCLUSIVE-OR gate
DEFINITIONS
Data Sheet IdentificationProduct StatusDefinition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
1997 Mar 18
9
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