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74LVC00A
LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE
HIGH PERFORMANCE
■ 5V TOLERANT INPUTS
■ HIGH SPEED: t
■ POWER DOWN PROTECTION ON INPUTS
= 4.3ns (MAX.) at VCC = 3V
PD
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
| = IOL = 24mA (MIN) at VCC = 3V
OH
■ PCI BUS LEVELS GUARANTEED AT 24 mA
■ BALANCED PROPAGATION DELAYS:
t
≅ t
PLH
PHL
■ OPERATING VOLTAGE RANGE:
V
(OPR) = 1.65V to 3.6V (1.2V Data
CC
Retention)
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 00
■ LA TCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LVC00A is a low voltage CMOS QUAD
2-INPUT NAND GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C
technology. It is ideal for 1.65 to 3.6 V
2
MOS
CC
TSSOPSOP
Table 1: Order Codes
PACKAGE T & R
SOP 74LVC00AMTR
TSSOP 74LVC00ATTR
operations and low power and low noise
applications.
It can be interfaced to 5V signal environment for
inputs in mixed 3.3/5V system.
It has more sp eed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static disc harge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin C onnection And I EC Logic Symbol s
Rev. 5
1/11July 2004
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74LVC00A
Figure 2: Input An d Output Equival e n t Ci rcui t
Table 2: Pin Description Table 3: Truth Table
PIN N° SYMBOL NAME AND FUNCTION
1, 4, 9, 12 1A to 4A Data Inputs
2, 5, 10, 13 1B to 4B Data Inputs
3, 6, 8, 11 1Y to 4Y Data Outputs
7 GND Ground (0V)
14
V
CC
Positive Supply Voltage
ABY
LLH
LHH
HLH
HHL
Table 4: Absolute Maximum Ratings
Symbol Parameter Value Unit
V
V
V
V
I
I
OK
I
I
or I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
absolute maximum rating must be observed
1) I
O
2) VO < GND
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage (VCC = 0V)
O
DC Output Voltage (High or Low State) (note 1) -0.5 to VCC + 0.5
O
DC Input Diode Current
IK
DC Output Diode Current (note 2)
DC Output Current
O
DC VCC or Ground Current per Supply Pin
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
-0.5 to +7.0 V
-0.5 to +7.0 V
-0.5 to +7.0 V
V
- 50 mA
- 50 mA
± 50 mA
± 100 mA
-65 to +150 °C
300 °C
2/11
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74LVC00A
Table 5: Recommended Operating Conditions
Symbol Parameter Value Unit
V
V
V
V
I
OH
I
OH
I
OH
I
OH
T
dt/dv Input Rise and Fall Time (note 2) 0 to 10 ns/V
1) Truth T abl e guarante ed: 1.2V to 3.6V
2) V
from 0.8V to 2V at VCC = 3.0V
IN
Table 6: DC Specifications
Supply Voltage (note 1)
CC
Input Voltage
I
Output Voltage (VCC = 0V)
O
Output Voltage (High or Low State) 0 to V
O
, I
High or Low Level Output Current (VCC = 3.0 to 3.6V)
OL
, I
High or Low Level Output Current (VCC = 2.7 to 3.0V)
OL
, I
High or Low Level Output Current (VCC = 2.3 to 2.7V)
OL
, I
High or Low Level Output Current (VCC = 1.65 to 2.3V)
OL
Operating Temperature
op
Test Condition Value
1.65 to 3.6 V
0 to 5.5 V
0 to 5.5 V
CC
± 24 mA
± 12 mA
± 8mA
± 4mA
-55 to 125 °C
V
Symbol Parameter
V
V
V
V
I
I
CC
∆I
High Level Input
IH
Voltage
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
I
Input Leakage
I
Current
Power Off Leakage
off
Current
Quiescent Supply
Current
ICC incr. per Input
CC
V
CC
(V)
1.65 to 1.95
-40 to 85 °C -55 to 125 °C
Min. Max. Min. Max.
0.65V
CC
0.65V
CC
2.3 to 2.7 1.7 1.7
2.7 to 3.6 2 2
1.65 to 1.95
0.35V
CC
0.35V
2.3 to 2.7 0.7 0.7
2.7 to 3.6 0.8 0.8
1.65 to 3.6
1.65
2.3
2.7
3.0
3.0
1.65 to 3.6
1.65
2.3
2.7
3.0
3.6
0
3.6
2.7 to 3.6
IO=-100 µAVCC-0.2 VCC-0.2
=-4 mA
I
O
I
=-8 mA
O
=-12 mA
I
O
=-18 mA
I
O
=-24 mA
I
O
IO=100 µA
=4 mA
I
O
=8 mA
I
O
=12 mA
I
O
=24 mA
I
O
= 0 to 5.5V
V
I
or VO = 5.5V
V
I
VI = VCC or GND
or VO = 3.6 to
V
I
5.5V
VIH = VCC-0.6V
1.2 1.2
1.7 1.7
2.2 2.2
2.4 2.4
2.2 2.2
0.2 0.2
0.45 0.45
0.7 0.7
0.4 0.4
0.55 0.55
± 5 ± 5 µA
10 10 µA
10 10
± 10 ± 10
500 500 µA
Unit
V
CC
V
V
V
µA
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74LVC00A
Table 7: Dynamic Switching Characteristics
Test Condition Value
= 25 °C
Symbol Parameter
V
CC
(V)
V
OLP
V
OLV
1) Number of output de fined as "n". M easured with "n -1" outputs switching fr om HI GH to LOW or LOW to HIGH. The rem ai ning output is
measur ed i n the LOW state.
Dynamic Low Level Quiet
Output (note 1)
3.3
= 50pF
C
L
V
= 0V, VIH = 3.3V
IL
Table 8: AC Electrical Characteristics
Test Condition Value
T
A
Min. Typ. Max.
0.8
-0.8
Unit
V
Symbol Parameter
t
PLH tPHL
Propagation Delay
Time
V
(V)
CC
C
(pF)
R
L
(Ω)
= t
t
L
s
(ns)
-40 to 85 °C -55 to 125 °C
r
Min. Max. Min. Max.
1.65 to 1.95 30 1000 2.0 9.0 12
2.3 to 2.7 30 500 2.0 6.0 8.0
2.7 50 500 2.5 5.1 6.1
Unit
ns
3.0 to 3.6 50 500 2.5 1 4.3 1 5.1
t
OSLH
t
OSHL
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the sa me directio n, either HIGH or LOW (t
2) Param eter guaran teed by design
Output To Output
Skew Time (note1,
2)
2.7 to 3.6 1 1 ns
OSLH
= | t
PLHm
- t
PLHn
|, t
OSHL
= | t
PHLm
- t
PHLn
|
Table 9: Capacitive Characteristics
Test Condition Value
= 25 °C
Symbol Parameter
V
CC
(V)
C
C
Input Capacitance
IN
Power Dissipation Capacitance
PD
(note 1)
1.8 fIN = 10MHz 27
3.3 33
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
T
A
Min. Typ. Max.
4pF
= CPD x VCC x fIN + ICC/n (per c ircuit )
Unit
pF2.5 30
4/11
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Figure 3: Test Circuit
74LVC00A
RT = Z
of pulse generator (typically 50Ω)
OUT
Table 10: Test Circuit And Waveform Symbol Value
V
Symbol
CC
1.65 to 1.95V 2.3 to 2.7V 2.7V 3.0 to 3.6V
C
L
R
L
V
IH
V
M
V
OH
= t
t
r
r
30pF 30pF 50pF 50pF
1000Ω 500Ω 500Ω 500Ω
V
CC
V
CC
2.7V 2.7V
VCC/2 VCC/2 1.5V 1.5V
V
CC
V
CC
3.0V 3.0V
<2.0ns <2.0ns <2.5ns <2.5ns
Figure 4: Waveform: Propagation Delay (f=1MHz; 50% duty cycle)
5/11
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74LVC00A
SO-14 MECHANICAL DATA
DIM.
A 1.35 1.75 0.053 0.069
A1 0.1 0.25 0.004 0.010
A2 1.10 1.65 0.043 0.065
B 0.33 0.51 0.013 0.020
C 0.19 0.25 0.007 0.010
D 8.55 8.75 0.337 0.344
E 3.8 4.0 0.150 0.157
e 1.27 0.050
H 5.8 6.2 0.228 0.244
h 0.25 0.50 0.010 0.020
L 0.4 1.27 0.016 0.050
k0° 8° 0° 8°
ddd 0.100 0.004
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
6/11
0016019D
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74LVC00A
TSSOP14 MECHANICAL DATA
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 4.9 5 5.1 0.193 0.197 0.201
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0˚ 8˚0˚ 8˚
L 0.45 0.60 0.75 0.018 0.024 0.030
A2
A
A1
b
e
c
K
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080337D
7/11
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74LVC00A
Tape & Reel SO-14 MECHANICAL DATA
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 330 12.992
C 12.8 13.2 0.504 0.519
D 20.2 0.795
N 60 2.362
T 22.4 0.882
Ao 6.4 6.6 0.252 0.260
Bo 9 9.2 0.354 0.362
Ko 2.1 2.3 0.082 0.090
Po 3.9 4.1 0.153 0.161
P 7.9 8.1 0.311 0.319
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74LVC00A
Tape & Reel TSSOP14 MECHANICAL DATA
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 330 12.992
C 12.8 13.2 0.504 0.519
D 20.2 0.795
N 60 2.362
T 22.4 0.882
Ao 6.7 6.9 0.264 0.272
Bo 5.3 5.5 0.209 0.217
Ko 1.6 1.8 0.063 0.071
Po 3.9 4.1 0.153 0.161
P 7.9 8.1 0.311 0.319
9/11
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74LVC00A
Table 11: Revision History
Date Revision Description of Changes
26-Jul-2004 5 Ordering Codes Revision - pag. 1.
10/11
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74LVC00A
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of use of s uch inf ormati on nor for a ny infr ing eme nt o f p atent s or o ther ri ghts of third parti es wh ich m ay res ult fr om i ts us e. No li cens e i s gr an ted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
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