Page 1
INTEGRATED CIRCUITS
74LV20
Dual 4-input NAND gate
Product specification
Supersedes data of 1997 Mar 28
IC24 Data Handbook
1998 Apr 20
Page 2
Philips Semiconductors Product specification
Dual 4-input NAND gate
FEA TURES
•Optimized for Low Voltage applications: 1.0 to 3.6V
•Accepts TTL input levels between V
•Typical V
T
amb
•Typical V
T
amb
(output ground bounce) 0.8V @ VCC = 3.3V,
OLP
= 25°C
(output VOH undershoot) 2V @ VCC = 3.3V,
OHV
= 25°C
•Output capability: standard
•I
category: SSI
CC
QUICK REFERENCE DATA
GND = 0V; T
SYMBOL
t
PHL/tPLH
C
I
C
PD
NOTES:
1C
is used to determine the dynamic power dissipation (PD in µW)
PD
= CPD V
P
D
= input frequency in MHz; CL = output load capacitance in pF;
f
i
f
= output frequency in MHz; VCC = supply voltage in V;
o
(C
2 The condition is V
= 25°C; tr =tf 2.5 ns
amb
CC
2
V
L
fo) = sum of the outputs.
CC
Propagation delay
nA, nB, nC, nD to nY
Input capacitance 3.5 pF
Power dissipation capacitance per gate Notes 1 and 2 22 pF
2
x fi (CL V
= GND to V
I
= 2.7V and VCC = 3.6V
CC
PARAMETER CONDITIONS TYPICAL UNIT
2
fo) where:
CC
CC
DESCRIPTION
The 74LV20 is a low–voltage Si–gate CMOS device and is pin and
function compatible with 74HC/HCT20.
The 74LV20 provides the 4–input NAND function.
CL = 15pF
VCC = 3.3V
8 ns
74L V20
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. #
14-Pin Plastic DIL –40°C to +125°C 74LV20 N 74LV20 N SOT27-1
14-Pin Plastic SO –40°C to +125°C 74LV20 D 74LV20 D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +125°C 74LV20 DB 74LV20 DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +125°C 74L V20 PW 74LV20PW DH SOT402-1
PIN DESCRIPTION
PIN
NUMBER
1, 9 1A to 2A Data inputs
2, 10 1B to 2B Data inputs
3, 11 NC No connection
4, 12 1C to 2C Data inputs
5, 13 1D to 2D Data inputs
6, 8 1Y to 2Y Data outputs
7 GND Ground (0V)
14 V
SYMBOL FUNCTION
CC
Positive supply voltage
FUNCTION TABLE
INPUTS OUTPUTS
nA nB nC nD nY
L X X X H
X L X X H
X X L X H
X X X L H
H H H H L
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = Don’t care
1998 Apr 20 853–1962 19256
2
Page 3
Philips Semiconductors Product specification
Dual 4-input NAND gate
PIN CONFIGURATION
1
1A
2
1B
3
NC
4
1C
5
1D
6
1Y
GND
74LV20
LOGIC SYMBOL
1A
14
V
CC
13
2D
12
2C
11
NC
2B
10
2A
9
2Y
87
1
1B
2
1C
4
1D
5
2A
9
2B
10
2C
12
2D
13
1Y
6
2Y
8
LOGIC SYMBOL (IEEE/IEC)
1
2
4
5
9
10
12
13
&
&
SV00360
SV00362
SV00361
LOGIC DIAGRAM
A
6
8
B
Y
C
D
SV00363
1998 Apr 20
3
Page 4
Philips Semiconductors Product specification
Dual 4-input NAND gate
74LV20
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT
V
CC
V
V
T
amb
tr, t
NOTES:
1 The LV is guaranteed to function down to V
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
V
CC
±I
IK
±I
OK
±I
O
DC supply voltage See Note1 1.0 3.3 3.6 V
Input voltage 0 – V
I
Output voltage 0 – V
O
Operating ambient temperature range in free
air
Input rise and fall times
f
= 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 3.6V.
CC
See DC and AC
characteristics
VCC = 1.0V to 2.0V
VCC = 2.0V to 2.7V
VCC = 2.7V to 3.6V
–40
–40
–
–
–
+85
+125
–
–
–
–
500
200
100
1, 2
PARAMETER CONDITIONS RATING UNIT
DC supply voltage –0.5 to +4.6 V
DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA
DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA
DC output source or sink current
– standard outputs
–0.5V < VO < VCC + 0.5V
25
CC
CC
V
V
°C
ns/V
mA
±I
GND
±I
CC
T
stg
P
TOT
DC VCC or GND current for types with
,
–standard outputs 50
Storage temperature range –65 to +150 °C
Power dissipation per package
–plastic DIL
–plastic mini-pack (SO)
–plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
mA
mW
NOTES:
1 Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2 The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 20
4
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Philips Semiconductors Product specification
HIGH l
t
voltage
LOW l
t
voltage
V
V
V
V
t
gy
Figures 1, 2
ns
Dual 4-input NAND gate
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
SYMBOL P ARAMETER TEST CONDITIONS
MIN TYP
V
IH
V
IL
OH
evel Inpu
evel Inpu
HIGH level output
voltage; all outputs
HIGH level output
OH
voltage;
STANDARD
V
outputs
LOW level output
OL
voltage; all outputs
LOW level output
OL
voltage;
STANDARD
V
outputs
Input leakage
I
I
current
CC
Quiescent supply
current; SSI
I
Additional
CC
quiescent supply
current per input
∆I
NOTE:
1 All typical values are measured at T
VCC = 1.2V 0.9 0.9
VCC = 2.0V 1.4 1.4
VCC = 2.7 to 3.6V 2.0 2.0
VCC = 1.2V 0.3 0.3
VCC = 2.0V 0.6 0.6
VCC = 2.7 to 3.6V 0.8 0.8
VCC = 1.2V; VI = VIH or V
VCC = 2.0V; VI = VIH or V
VCC = 2.7V; VI = VIH or V
VCC = 3.0V; VI = VIH or V
VCC = 3.0V; VI = VIH or V
VCC = 1.2V; VI = VIH or V
VCC = 2.0V; VI = VIH or V
VCC = 2.7V; VI = VIH or V
VCC = 3.0V;VI = VIH or V
VCC = 3.0V;VI = VIH or V
–IO = 100µA 1.2
IL;
–IO = 100µA 1.8 2.0 1.8
IL;
–IO = 100µA 2.5 2.7 2.5
IL;
–IO = 100µA 2.8 3.0 2.8
IL;
–IO = 6mA 2.40 2.82 2.20 V
IL;
IO = 100µA 0
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 100µA 0 0.2 0.2
IL;
IO = 6mA 0.25 0.40 0.50 V
IL;
VCC = 3.6V; VI = VCC or GND 1.0 1.0 µA
VCC = 3.6V; VI = VCC or GND; IO = 0 20.0 40 µA
VCC = 2.7V to 3.6V; VI = VCC –0.6V 500 850 µA
= 25°C.
amb
74LV20
LIMITS
-40°C to +85°C -40°C to +125°C
1
MAX MIN MAX
UNIT
V
V
AC CHARACTERISTICS
GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ
SYMBOL
PHL/tPLH
NOTE:
1 Unless otherwise stated, all typical values are at T
2 Typical value measured at V
1998 Apr 20
PARAMETER WAVEFORM
Propagation delay
nA, nB, nC, nD to nY
= 3.3V.
CC
amb
CONDITION
VCC(V) MIN TYP1MAX MIN MAX
1.2 – 50 – – –
2.0 – 17 32 – 39
2.7 – 13 24 – 29
3.0 to 3.6 – 10
= 25°C.
5
LIMITS
–40 to +85 °C
2
LIMITS
–40 to +125 °C
19 – 23
UNIT
Page 6
Philips Semiconductors Product specification
Dual 4-input NAND gate
AC WAVEFORMS
VM = 1.5V at VCC 2.7V 3.6V
V
= 0.5V * VCC at V
M
and V
V
OL
output load.
OH
nA, nB, nC, nD
INPUT
GND
V
nY OUTPUT
V
V
OH
OL
are the typical output voltage drop that occur with the
I
2.7V
CC
V
M
t
PHL
V
M
Figure 1.Input (nA, nB, nC, nD) to
output (nY) propagation delays.
t
PLH
SV00364
TEST CIRCUIT
V
V
PULSE
GENERATOR
DEFINITIONS
RL = Load resistor
C
= Load capacitance includes jig and probe capacitance
L
RT = Termination resistance should be equal to Z
TEST
t
PLH/tPHL
Figure 2. Load circuitry for switching times
I
D.U.T.
R
T
Test Circuit for switching times
V
CC
< 2.7V V
2.7–3.6V 2.7V
CC
74LV20
V
O
50pF
C
L
of pulse generators.
OUT
V
I
CC
RL = 1k
SV00901
1998 Apr 20
6
Page 7
Philips Semiconductors Product specification
Dual 4-input NAND gate
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
74LV20
1998 Apr 28
Page 8
Philips Semiconductors Product specification
Dual 4-input NAND gate
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
74LV20
1998 Apr 28
Page 9
Philips Semiconductors Product specification
Dual 4-input NAND gate
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
74LV20
1998 Apr 28
Page 10
Philips Semiconductors Product specification
Dual 4-input NAND gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
74LV20
1998 Apr 28
Page 11
Philips Semiconductors Product specification
Dual 4-input NAND gate
74LV20
NOTES
1998 Apr 28
Page 12
Philips Semiconductors Product specification
Dual 4-input NAND gate
74LV20
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code Date of release: 05-96
Document order number: 9397-750-04401 1
1998 Apr 28
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