Page 1
Low voltage CMOS dual D-Type Flip Flop
Features
■ 5V tolerant inputs
■ High speed:
–f
■ Power down protection on inputs and outputs
■ Symmetrical output impedance:
–|I
■ PCI bus levels guaranteed at 24mA
■ Balanced propagation delays:
–t
■
Operating voltage range:
–V
■ Pin and function compatible with
74 series 74
■ Latch-up performance exceeds
500mA (JESD 17)
■ ESD performance:
– HBM > 2000V
= 150MHz (Max) at V
MAX
| = IOL = 24mA (Min) at VCC = 3V
OH
≅ t
PLH
PHL
(Opr) = 2.0V to 3.6V
CC
CC
= 3V
(MIL STD 883 method 3015); MM > 200V
74LCX74
with 5V tolerant inputs
SO-14 TSSOP14
Description
The 74LCX74 is a low voltage CMOS dual D-type
flip flop with preset and clear non inverting
fabricated with sub-micron silicon gate and
double-layer metal wiring C
ideal for low power and high speed 3.3V
applications; it can be interfaced to 5V signal
environment for inputs.
A signal on the D INPUT is transferred to the Q
OUTPUT during the positive going transition of
the clock pulse.
CLR
and PR are independent of the clock and
accomplished by a low setting on the appropriate
input.
2
MOS technology. It is
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Order codes
Part number Package Packaging
74LCX74MTR SO-14 Tape and reel
74LCX74TTR TSSOP14 Tape and reel
July 2006 Rev 8 1/17
www.st.com
17
Page 2
Contents 74LCX74
Contents
1 Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
Page 3
74LCX74 Logic symbols and I/O equivalent circuit
1 Logic symbols and I/O equivalent circuit
Figure 1. IEC logic symbols
Figure 2. Input and output equivalent circuit
1.1 Logic diagram
Figure 3. Logic diagram
Note: This logic diagram has not to be used to estimate propagation delays
3/17
Page 4
Pin settings 74LCX74
2 Pin settings
2.1 Pin connection
Figure 4. Pin connection (top through view)
2.2 Pin description
Table 1. Pin description
Pin N° Symbol Name and function
1, 13 1CLR, 2CLR Asynchronous reset - direct input
2, 12 1D, 2D Data inputs
3, 11 1CK, 2CK Clock input (LOW to HIGH, Edge Triggered)
4, 10 1PR
5, 9 1Q, 2Q True Flip-Flop outputs
6, 8 1Q
7 GND Ground (0V)
14 V
2.3 Truth table
Table 2. Truth table
CLR PR D CK Q Q
L H X X L H CLEAR
H L X X H L PRESET
LLXXHH
HHL LH
HHH HL
HH
1. X do not care
, 2PR Asynchronous set - direct input
, 2Q Complement Flip-Flop outputs
CC
Inputs Outputs
(1)
X
Positive supply voltage
Q
n
Function
Q
n
No change
4/17
Page 5
74LCX74 Maximum rating
3 Maximum rating
stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. these are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. exposure to absolute maximum rating conditions for
extended periods may affect device reliability. refer also to the STMicroelectronics sure
program and other relevant quality documents.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
I
I
I
GND
T
1. IO absolute maximum rating must be observed
2. VO < GND
Supply voltage -0.5 to +7.0 V
CC
V
DC input voltage -0.5 to +7.0 V
I
DC output voltage (VCC = 0V)
V
O
V
DC output voltage (high or low state)
O
I
DC input diode current -50 mA
IK
DC output diode current
OK
I
DC output current ± 50 mA
O
DC supply current per supply pin ± 100 mA
CC
(2)
(1)
-0.5 to +7.0 V
-0.5 to VCC + 0.5
-50 mA
DC ground current per supply pin ± 100 mA
Storage temperature -65 to +150 °C
stg
T
Lead temperature (10 sec) 300 °C
L
V
3.1 Recommended operating conditions
Table 4. Recommended operating conditions
Symbol Parameter Value Unit
V
V
V
V
Supply voltage
CC
Input voltage 0 to 5.5 V
I
Output voltage (VCC = 0V)
O
Output voltage (high or low state)
O
IOH, IOLHigh or low level output current (VCC = 3.0 to 3.6V)
I
, IOLHigh or low level output current (VCC = 2.7V)
OH
T
dt/dv
1. Truth table guaranteed: 1.5V to 3.6V
2. VIN from 0.8V to 2V at VCC = 3.0V
Operating temperature -40 to 85 °C
op
Input Rise and Fall Time
(1)
(2)
5/17
2.0 to 3.6 V
0 to 5.5 V
0 to V
CC
± 24 mA
± 12 mA
0 to 10 ns/V
V
Page 6
Electrical characteristics 74LCX74
4 Electrical characteristics
Table 5. DC specifications
Test condition Value
Symbol Parameter
V
CC
(V)
-40 to 85°C
Min Max
Unit
V
IH
High level input
voltage
2.0 V
2.7 to 3.6
V
V
OH
V
OL
I
I
off
I
CC
∆I
CC
Low level input
IL
voltage
High level output
voltage
Low level output
voltage
Input leakage current 2.7 to 3.6
I
Power OFF leakage
current
Quiescent supply
current
I incr. per Input 2.7 to 3.6
2.7 to 3.6
2.7
3.0
2.7 to 3.6
2.7
3.0
0
2.7 to 3.6
=-100 µAVCC-0.2
I
O
=-12 mA
I
O
I
=-18 mA
O
I
=-24 mA
O
I
=100 µA
O
=12 mA
I
O
I
=16 mA
O
I
=24 mA
O
= 0 to 5.5V
V
I
VI or VO = 5.5V
VI = VCC or GND
V
or VO= 3.6 to 5.5V
I
= VCC - 0.6V
V
IH
0.8 V
2.2
V
2.4
2.2
0.2
0.4
V
0.4
0.55
± 5 µA
10 µA
10
µA
± 10
500 µA
Table 6. Dynamic switching characteristics
Symbol Parameter
V
OLP
V
OLV
1. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to
HIGH. The remaining output is measured in the LOW state.
Dynamic low level quiet
(1)
output
6/17
V
Test condition Value
CC
(V)
= 50pF
C
3.3
L
VIL = 0V, VIH = 3.3V
TA = 25 °C
Min Typ Max
0.8
-0.8
Unit
V
Page 7
74LCX74 Electrical characteristics
Table 7. AC electrical characteristics
Test condition Value
Symbol Parameter
Propagation delay
t
PLH tPHL
time (CK to Q or
Q)
Propagation delay
t
PLH tPHL
time (PR
or CLR
to Q or Q)
Setup time, HIGH
t
or LOW level D to
S
CK
Hold time, HIGH
t
or LOW level D to
h
CK
CK Pulse width,
t
HIGH or LOW
W
PR or CLR Pulse
V
CC
(V)
C
(pF)
L
R
(Ω)
t
L
= t
s
(ns)
2.7
3.0 to 3.6 1.5 7.0
50 500 2.5
2.7
3.0 to 3.6 1.5 7.0
50 500 2.5
2.7
3.0 to 3.6 2.5
50 500 2.5
2.7
3.0 to 3.6 1.5
50 500 2.5
2.7
3.0 to 3.6 3.0
50 500 2.5
r
-40 to 85 °C
Min Max
1.5 8.0
1.5 8.0
2.5
1.5
3.0
Width, LOW
t
rec
f
MAX
t
OSLH
t
OSHL
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
outputs of the same device switching in the same direction, either HIGH or LOW (t
t
OSHL
2. Parameter guaranteed by design
Recovery time PR
or CLR to CK
Clock pulse
frequency
Output to output
skew time
= | t
PHLm
- t
PHLn
(1) (2)
|)
2.7
3.0 to 3.6 0
50 500 2.5
2.7 50 500 2.5 150 MHz
3.0 to 3.6 50 500 2.5 1.0 ns
OSLH
0
= | t
PLHm
- t
PLHn
Unit
ns
ns
ns
ns
ns
ns
|,
Table 8. Capacitive characteristics
Test condition Value
T
Symbol Parameter
V
CC
(V)
= 0 to V
C
C
1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the
operating current consumption without load. (Refer to Test Circuit). Average operating current can be
obtained by the following equation. I
Input capacitance 3.3
IN
Power dissipation
PD
capacitance
(1)
3.3
= CPD x VCC x fIN + ICC/2 (per gate)
CC(opr)
V
IN
= 10MHz
f
IN
= 0 or V
V
IN
CC
CC
7/17
= 25 °C
A
Min Typ Max
6pF
40 pF
Unit
Page 8
Test circuit 74LCX74
5 Test circuit
Figure 5. Test circuit
C
= 50pF or equivalent (includes jig and probe capacitance)
L
R
= 500Ω or equivalent
L
R
= Z
T
of pulse generator (typically 50Ω)
OUT
6 Waveforms
Figure 6. Propagation delays, setup and hold times (f = 1MHz; 50% duty cycle)
8/17
Page 9
74LCX74 Waveforms
Figure 7. Propagation delays (f=1MHz; 50% duty cycle)
Figure 8. Recovery times (f=1MHz; 50% duty cycle)
9/17
Page 10
Waveforms 74LCX74
Figure 9. Pulse width (f=1MHz; 50% duty cycle)
10/17
Page 11
74LCX74 Package mechanical data
7 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/17
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Package mechanical data 74LCX74
SO-14 MECHANICAL DATA
DIM.
A 1.35 1.75 0.053 0.069
A1 0.1 0.25 0.004 0.010
A2 1.10 1.65 0.043 0.065
B 0.33 0.51 0.013 0.020
C 0.19 0.25 0.007 0.010
D 8.55 8.75 0.337 0.344
E 3.8 4.0 0.150 0.157
e 1.27 0.050
H 5.8 6.2 0.228 0.244
h 0.25 0 .50 0.010 0.020
L 0.4 1.27 0.016 0.050
k0° 8°0° 8°
ddd 0.100 0.004
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
12/17
0016019D
Page 13
74LCX74 Package mechanical data
TSSOP14 MECHANICAL DATA
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 4.9 5 5.1 0.193 0.197 0.201
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0˚ 8˚0˚ 8˚
L 0.45 0.60 0.75 0.018 0.024 0.030
mm. inch
A2
A
PIN 1 IDENTIFICATION
A1
b
e
c
K
L
E
D
E1
1
0080337D
13/17
Page 14
Package mechanical data 74LCX74
Tape & Reel SO-14 MECHANICAL DATA
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 330 12.992
C 12.8 13.2 0.504 0.519
D 20.2 0.795
N 60 2.362
T 22.4 0.882
Ao 6.4 6.6 0.252 0.260
Bo 9 9.2 0.354 0.362
Ko 2.1 2.3 0.082 0.090
Po 3.9 4.1 0.153 0.161
P 7.9 8.1 0.311 0.319
mm. inch
14/17
Page 15
74LCX74 Package mechanical data
Tape & Reel TSSOP14 MECHANICAL DATA
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 330 12.992
C 12.8 13.2 0.504 0.519
D 20.2 0.795
N 60 2.362
T 22.4 0.882
Ao 6.7 6.9 0.264 0.272
Bo 5.3 5.5 0.209 0.217
Ko 1.6 1.8 0.063 0.071
Po 3.9 4.1 0.153 0.161
P 7.9 8.1 0.311 0.319
mm. inch
15/17
Page 16
Revision history 74LCX74
8 Revision history
Table 9. Revision history
Date Revision Changes
15-Sep-2004 7 Ordering codes revision - pag. 1.
10-Jul-2006 8 New template, temperature ranges updated
16/17
Page 17
74LCX74
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