Datasheet 74LCX245 Datasheet (ST)

74LCX245

LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER

(3-STATE) WITH 5V TO LER A N T IN PU TS AN D OUTPUTS

■ 5V TOLERANT INPUTS AND OUTPUTS

■ HIGH SPEED:

t

= 7.0 ns (MAX.) at VCC = 3V

PD

■ POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I

| = IOL = 24mA (MIN) at VCC = 3V

OH

■ PCI BUS LEVELS GUARANTEED AT 24 mA

■ BALANCED PROPAGATION DELAYS:

t

≅ t

PLH

PHL

■ OPERATING VOLTAGE RANGE:

V

(OPR) = 2.0V to 3.6V (1.5V Data

CC

Retention)

■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 245

■ LA TCH-UP PERFORMANCE EXCEEDS

500mA (JESD 17)

■ ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015); MM > 200V

DESCRIPTION

The 74LCX245 is a low voltage CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C

2

MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and ou tputs.

TSSOPSOP

Table 1: Order Codes

PACKAGE T & R

SOP 74LCX245MTR

TSSOP 74LCX245TTR

It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. This IC is intended for two way asynchronous communication betwee n data bu ses; the direction of data transmission is determined by DIR input. The enable input G

can be used to disable the device so that the buses are effectively isolated. All inputs and outputs are equipped with protection circuits against static disc harge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z state must be held HIGH or LOW.

Figure 1: Pin C onnection And I EC Logic Symbol s

Rev. 4

1/13September 2004

74LCX245

Figure 2: Input An d Output Equival e n t Ci rcui t

Table 2: Pin Description

PIN N° SYMBOL NAME AND FUNCTION

1 DIR Directional Control

2, 3, 4, 5, 6, 7, 8, 9 A1 to A8 Data Inputs/Outputs

18, 17, 16, 15, 14, 13, 12, 11 B1 to B8 Data Inputs/Outputs

19 G 10 GND Ground (0V) 20 V

CC

Output Enable Input

Positive Supply Voltage

Table 3: Truth Table

INPUTS FUNCTION

G

L L OUTPUT INPUT A = B L H INPUT OUTPUT B = A

HXZZZ

X : Don’t Care Z : High Impedance

DIR A BUS B BUS

OUTPUT

2/13

74LCX245

Table 4: Absolute Maximum Ratings

Symbol Parameter Value Unit

V

V V V

I

OK

I

CC

I

GND

T

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

1) I

absolute maximum rating must be observed

O

< GND

2) V

O

Table 5: Recommended Operating Conditions

Supply Voltage

CC

DC Input Voltage

I

DC Output Voltage (OFF State)

O

DC Output Voltage (High or Low State) (note 1) -0.5 to VCC + 0.5

O

DC Input Diode Current

IK

DC Output Diode Current (note 2) DC Output Current

O

DC Supply Current per Supply Pin DC Ground Current per Supply Pin Storage Temperature

stg

Lead Temperature (10 sec)

L

-0.5 to +7.0 V

-0.5 to +7.0 V V

- 50 mA

± 50 mA ± 100 mA ± 100 mA

-65 to +150 °C 300 °C

Symbol Parameter Value Unit

I I

V

V V V

OH OH

T

Supply Voltage (note 1)

CC

Input Voltage

I

Output Voltage (OFF State)

O

Output Voltage (High or Low State) 0 to V

O

, I

High or Low Level Output Current (VCC = 3.0 to 3.6V)

OL

, I

High or Low Level Output Current (VCC = 2.7V)

OL

Operating Temperature

op

2.0 to 3.6 V 0 to 5.5 V 0 to 5.5 V

CC

± 24 mA ± 12 mA

-55 to 125 °C

dt/dv Input Rise and Fall Time (note 2) 0 to 10 ns/V

1) Truth T abl e guarante ed: 1.5V to 3.6V from 0.8V to 2V at VCC = 3.0V

2) V

IN

V

3/13

74LCX245

Table 6: DC Specifications

Test Condition Value

Symbol Parameter

V

I

OZ

High Level Input

IH

Voltage Low Level Input

IL

Voltage High Level Output

OH

Voltage

Low Level Output

OL

Voltage

Input Leakage

I

Current Power Off Leakage

off

Current High Impedance

Output Leakage Current

I

CC

∆I

Quiescent Supply Current

ICC incr. per Input

CC

V

CC

(V)

2.7 to 3.6

2.7

3.0

2.7 to 3.6

2.7

3.0

2.7 to 3.6

0

2.7 to 3.6

-40 to 85 °C -55 to 125 °C

Min. Max. Min. Max.

2.0 2.0 V

0.8 0.8 V

IO=-100 µAVCC-0.2 VCC-0.2

I

=-12 mA

O

=-18 mA

I

O

=-24 mA

I

O

IO=100 µA

I

=12 mA

O

I

=16 mA

O

=24 mA

I

O

= 0 to 5.5V

V

I

or VO = 5.5V

V

I

= VIH or V

V

I

VO = 0 to V

VI = VCC or GND

V

or VO= 3.6 to 5.5V

I

VIH = VCC - 0.6V

IL

CC

2.2 2.2

2.4 2.4

2.2 2.2

0.2 0.2

0.4 0.4

0.55 0.55 ± 5 ± 5 µA

10 10 µA

± 5 ± 5 µA

10 10

± 10 ± 10

500 500 µA

Unit

V

µA

Table 7: Dynamic Switching Characteristics

Test Condition Value

= 25 °C

Symbol Parameter

V

CC

(V)

V

OLP

V

OLV

1) Number of outputs defined as "n". Measured wi t h "n-1" output s switching from HIGH to LO W or LOW to HIGH. The remaining output is measur ed i n the LOW state.

Dynamic Low Level Quiet Output (note 1)

3.3

= 50pF

C

L

V

= 0V, VIH = 3.3V

IL

T

A

Min. Typ. Max.

0.8

-0.8

Unit

V

4/13

Table 8: AC Electrical Characteristics

Test Condition Value

74LCX245

Symbol Parameter

V

CC

(V)

t

PLH tPHL

t

PZL tPZH

Propagation Delay Time

2.7

3.0 to 3.6 1.5 7.0 1.5 8.1

Output Enable Time 2.7

3.0 to 3.6 1.5 8.5 1.5 9.7

t

PLZ tPHZ

Output Disable Time 2.7

3.0 to 3.6 1.5 7.5 1.5 8.7

t

OSLH

t

OSHL

1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the sa me directio n, either HIGH or LOW (t

2) Param eter guaran teed by design

Output To Output Skew Time (note1,

2)

3.0 to 3.6 50 500 2.5 1.0 1.0 ns

OSLH

C

L

(pF)

50 500 2.5

= | t

PLHm

- t

R

(Ω)

PLHn

|, t

L

OSHL

t

s

(ns)

= t

= | t

-40 to 85 °C -55 to 125 °C

r

Min. Max. Min. Max.

1.5 8.0 1.5 9.2

1.5 9.5 1.5 10.7

1.5 8.5 1.5 9.7

- t

PHLn

|)

PHLm

Unit

ns

Table 9: Capacitive Characteristics

Test Condition Value

= 25 °C

Symbol Parameter

C

OUT

C

Input Capacitance

IN

Output Capacitance Power Dissipation Capacitance

PD

(note 1)

V

CC

(V)

3.3

VIN = 0 to V VIN = 0 to V

3.3 fIN = 10MHz V

= 0 or V

IN

CC CC

CC

T

A

Min. Typ. Max.

6pF 12 pF 45

Unit

pF

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I

= CPD x VCC x fIN + ICC/8 (per c ircuit )

CC(opr)

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74LCX245

Figure 3: Test Circuit

t

, t

PLH

PHL

, t

t

PZL

PLZ

, t

t

PZH

PHZ

TEST SWITCH

Open

6V

GND

CL = 50 pF or equivalent (includes jig and probe capacitance)

= R1 = 500Ω or equivalent

R

L

R

= Z

of pulse generator (typically 50Ω)

T

OUT

Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)

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74LCX245

Figure 5: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)

7/13

74LCX245

SO-20 MECHANICAL DATA

DIM.

A 2.35 2.65 0.093 0.104

A1 0.1 0.30 0.004 0.012

B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.60 13.00 0.496 0.512 E 7.4 7.6 0.291 0.299

e 1.27 0.050

H 10.00 10.65 0.394 0.419

h 0.25 0.75 0.010 0.030 L 0.4 1.27 0.016 0.050 k0° 8° 0° 8°

ddd 0.100 0.004

MIN. TYP MAX. MIN. TYP. MAX.

mm. inch

8/13

0016022D

74LCX245

TSSOP20 MECHANICAL DATA

mm. inch

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

A 1.2 0.047

A1 0.05 0.15 0.002 0.004 0.006

A2 0.8 1 1.05 0.031 0.039 0.041

b 0.19 0.30 0.007 0.012

c 0.09 0.20 0.004 0.0079

D 6.4 6.5 6.6 0.252 0.256 0.260

E 6.2 6.4 6.6 0.244 0.252 0.260

E1 4.3 4.4 4.48 0.169 0.173 0.176

e 0.65 BSC 0.0256 BSC

K0˚ 8˚0˚ 8˚

L 0.45 0.60 0.75 0.018 0.024 0.030

A2

A

A1

b

e

K

c

L

E

D

E1

PIN 1 IDENTIFICATION

1

0087225C

9/13

74LCX245

Tape & Reel SO-20 MECHANICAL

mm. inch

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

A 330 12.992 C 12.8 13.2 0.504 0.519 D 20.2 0.795 N 60 2.362

T 30.4 1.197 Ao 10.8 11 0.425 0.433 Bo 13.2 13.4 0.520 0.528 Ko 3.1 3.3 0.122 0.130 Po 3.9 4.1 0.153 0.161

P 11.9 12.1 0.468 0.476

DATA

10/13

74LCX245

Tape & Reel TSSOP20 MECHANICAL DATA

mm. inch

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

A 330 12.992 C 12.8 13.2 0.504 0.519 D 20.2 0.795 N 60 2.362

T 22.4 0.882 Ao 6.8 7 0.268 0.276 Bo 6.9 7.1 0.272 0.280 Ko 1.7 1.9 0.067 0.075 Po 3.9 4.1 0.153 0.161

P 11.9 12.1 0.468 0.476

11/13

74LCX245

Table 10: Revision History

Date Revision Descrip tion of Change s

15-Sep-2004 4 Ordering Codes Revision - pag. 1.

12/13

74LCX245

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