Datasheet 74 hct85 DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT85

4-bit magnitude comparator

Product speciﬁcation File under Integrated Circuits, IC06

December 1990

Philips Semiconductors Product speciﬁcation

4-bit magnitude comparator 74HC/HCT85

FEATURES

• Serial or parallel expansion without extra gating

• Magnitude comparison of any binary words

• Output capability: standard

• ICC category: MSI

weighted (A0 to A3 and B0 to B3), where A3 and B3 are the most significant bits.

The operation of the “85” is described in the function table, showing all possible logic conditions. The upper part of the table describes the normal operation under all conditions that will occur in a single device or in a series expansion scheme. In the upper part of the table the three outputs are

GENERAL DESCRIPTION

The 74HC/HCT85 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT85 are 4-bit magnitude comparators that can be expanded to almost any length. They perform comparison of two 4-bit binary, BCD or other monotonic codes and present the three possible magnitude results at

, Q

the outputs (Q

A>B

A=B

and Q

). The 4-bit inputs are

A<B

mutually exclusive. In the lower part of the table, the outputs reflect the feed forward conditions that exist in the parallel expansion scheme.

For proper compare operation the expander inputs (I I

A=B

and I

) to the least significant position must be

A<B

connected as follows: I I

= HIGH.

A=B

For words greater than 4-bits, units can be cascaded by connecting outputs Q corresponding inputs of the significant comparator.

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf= 6 ns

amb

SYMBOL PARAMETER CONDITIONS

t

PHL/ tPLH

C

I

C

PD

propagation delay CL= 15 pF; VCC=5 V A

, Bn to Q

n

, Bn to Q

A

n

I

A<B,

I

to Q

A=B

, I

A=B

, I

A=B

A>B A=B

A>B

, Q

to Q

A<B

, Q

A>B

input capacitance 3.5 3.5 pF power dissipation capacitance per package notes 1 and 2 18 20 pF

A<B=IA>B

, Q

A<B

A>Β

= = LOW and

and Q

A=B

to the

TYPICAL

HC HCT

20 22 ns 18 20 ns 15 15 ns 11 15 ns

A>B

UNIT

,

Notes

1. C

is used to determine the dynamic power dissipation (PD in µW):

PD

PD=CPD× V

2

× fi+ ∑ (CL× V

CC

2

× fo) where:

CC

fi= input frequency in MHz fo= output frequency in MHz ∑ (CL× V

2

× fo) = sum of outputs

CC

CL= output load capacitance in pF VCC= supply voltage in V

2. For HC the condition is VI= GND to V

CC

For HCT the condition is VI= GND to VCC− 1.5 V

ORDERING INFORMATION

“74HC/HCT/HCU/HCMOS Logic Package Information”

See

December 1990 2

.

Philips Semiconductors Product speciﬁcation

4-bit magnitude comparator 74HC/HCT85

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

2I 3I 4I 5Q 6Q 7Q

A<B A=B A>B

A>B A=B A<B

8 GND ground (0 V) 9, 11, 14, 1, B 10, 12, 13, 15 A 16 V

to B

0

to A

0 CC

3 3

A< B expansion input A = B expansion input A>B expansion input A> B output A = B output A<B output

word B inputs word A inputs positive supply voltage

Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.

December 1990 3

Philips Semiconductors Product speciﬁcation

4-bit magnitude comparator 74HC/HCT85

Fig.4 Functional diagram.

APPLICATIONS

• Process controllers

• Servo-motor control

FUNCTION TABLE

COMPARING INPUTS CASCADING INPUTS OUTPUTS

, B

A

3

A3>B A3<B A3=B A3=B

A

3=B3

A3=B A3=B A3=B

A

3=B3

A3=B A3=B

A

3=B3

A3=B A3=B

A2, B

3

3 3

3 3 3

3 3

X X A2>B A2<B

A2=B A2=B A2=B A2=B

A2=B A2=B A2=B

2

2 2

2 2 2 2

2 2 2

A1, B

X X X X

A1>B A1<B A1=B A1=B

A1=B A1=B A1=B

A0, B

1

X X X X

X

1

X

1

A0>B

1

A0<B

1

A0=B

1

A0=B

1

A0=B

1

A0=B

1

A0=B

1

A0=B

1

I

0

A>B

X X X X

X X X

0

X

0

H

0

L

0

L

0

X

0

H

0

L

0

I

A<B

X X X X

L H L

X H L

I

A=B

X X X X

L L H

H L L

Q

A>B

H L H L

H L L

L L H

Q

A<B

L H L H

L H L

L L H

Q

A=B

L L L L

L L H

H L L

Notes

1. H = HIGH voltage level L = LOW voltage level X = don’t care

December 1990 4

Philips Semiconductors Product speciﬁcation

4-bit magnitude comparator 74HC/HCT85

Fig.5 Logic diagram.

December 1990 5

Philips Semiconductors Product speciﬁcation

4-bit magnitude comparator 74HC/HCT85

DC CHARACTERISTICS FOR 74HC

For the DC characteristics see

“74HC/HCT/HCU/HCMOS Logic Family Specifications”

Output capability: standard ICC category: MSI

AC CHARACTERISTICS FOR 74HC

GND = 0 V; t

= 6 ns; CL= 50 pF

r=tf

SYMBOL PARAMETER

t

PHL

t

PHL

t

PHL

t

PHL

t

THL

/ t

propagation delay

PLH

An, Bn to Q

propagation delay

PLH

An, Bn to Q

propagation delay

PLH

I

, I

A<B

A=B

Q

, Q

A<B

propagation delay

PLH

I

to Q

A=B

output transition time 19

TLH

, I

A>B

A=B

A>B

A=B

A>B

or Q

to

A<B

(°C) TEST CONDITIONS

T

amb

74HC

min. typ. max. min. max. min. max.

63 23 18

58 21 17

50 18 14

39 14 11

7 6

195 39 33

175 35 30

140 28 24

120 24 20

75 15 13

245 49 42

220 44 37

175 35 30

150 30 26

95 19 16

295 59 50

265 53 45

210 42 36

180 36 31

110 22 19

.

UNIT

ns 2.0

V

(V)

4.5

6.0

4.5

6.0

4.5

6.0

4.5

6.0

4.5

6.0

CC

WAVEFORMS+25 −40 to +85 −40 to +125

Fig.6

December 1990 6

Philips Semiconductors Product speciﬁcation

4-bit magnitude comparator 74HC/HCT85

DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see

“74HC/HCT/HCU/HCMOS Logic Family Specifications”

.

Output capability: standard ICC category: MSI

Note to HCT types

The value of additional quiescent supply current (∆I

) for a unit load of 1 is given in the family specifications.

CC

To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.

INPUT UNIT LOAD COEFFICIENT

I

A<B

I

A>B

I

A=B

An, B

n

1.00

1.50

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; tr=tf= 6 ns; CL= 50 pF

(°C) TEST CONDITIONS

T

amb

74HCT

SYMBOL PARAMETER

UNIT

V

min. typ. max. min. max. min. max.

t

PHL

t

PHL

t

PHL

t

PHL

t

THL

/ t

propagation delay

PLH

An, Bn to Q

propagation delay

PLH

An, Bn to Q

propagation delay

PLH

I

, I

A<B

A=B

Q

, Q

A<B

propagation delay

PLH

I

to Q

A=B

output transition time 7 15 19 22 ns 4.5 Fig.6

TLH

A>B

, I

A=B

A>B

A=B

A>B

or Q

to

A<B

26 44 55 66 ns 4.5 Fig.6

24 40 50 60 ns 4.5 Fig.6

18 31 39 47 ns 4.5 Fig.6

CC

(V)

WAVEFORMS+25 −40 to +85 −40 to +125

December 1990 7

Philips Semiconductors Product speciﬁcation

4-bit magnitude comparator 74HC/HCT85

AC WAVEFORMS

(1) HC : VM= 50%; VI= GND to VCC.

= 1.3 V; VI= GND to 3 V.

HCT: V

M

Fig.6 Waveforms showing the word A inputs (An), word B inputs (Bn) and expansion inputs (In) to the outputs

(Qn) propagation delays and the output transition times.

APPLICATION INFORMATION

Fig.7 Series cascading; comparing 12-bit words.

December 1990 8

Philips Semiconductors Product speciﬁcation

4-bit magnitude comparator 74HC/HCT85

Fig.8 Parallel cascading; comparing 12-bit words.

PACKAGE OUTLINES

See

“74HC/HCT/HCU/HCMOS Logic Package Outlines”

December 1990 9

.