Page 1
DATA SH EET
Product specification
Supersedes data of March 1988
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT7541
Octal Schmitt trigger buffer/line
driver; 3-state
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
Page 2
December 1990 2
Philips Semiconductors Product specification
Octal Schmitt trigger buffer/line driver; 3-state 74HC/HCT7541
FEATURES
• Non-inverting outputs
• Schmitt trigger action on all data inputs
• Output capability: bus driver
• ICCcategory: MSI
GENERAL DESCRIPTION
The 74HC/HCT7541 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT7541 are octal Schmitt trigger
non-inverting buffer/line drivers with 3-state outputs. The
3-state outputs are controlled by the output enable inputs
OE1and OE2.
A HIGH on OEncauses the outputs to assume a high
impedance OFF-state.
The Schmitt trigger action in the data inputs transforms
slowly changing input signals into sharply defined
jitter-free output signals.
The “7541” is identical to the “541” but has hysteresis on
the data inputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
=25°C; tr=tf= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (PDin µW):
PD=CPD× V
CC
2
× fi+∑(CL× V
CC
2
× fo) where:
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
CC
2
× fo) = sum of outputs
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL
/ t
PLH
propagation delay Anto Y
n
CL= 15 pF; VCC= 5 V 10 16 ns
C
I
input capacitance 3.5 3.5 pF
C
PD
power dissipation capacitance per buffer notes 1 and 2 30 32 pF
Page 3
December 1990 3
Philips Semiconductors Product specification
Octal Schmitt trigger buffer/line driver; 3-state 74HC/HCT7541
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 19
OE1, OE
2
output enable inputs (active LOW)
2, 3, 4, 5, 6, 7, 8, 9 A
0
to A
7
data inputs
10 GND ground (0 V)
18, 17, 16, 15, 14, 13, 12, 11 Y
0
to Y
7
bus outputs
20 V
CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol. Fig.3 IEC logic symbol.
Page 4
December 1990 4
Philips Semiconductors Product specification
Octal Schmitt trigger buffer/line driver; 3-state 74HC/HCT7541
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
INPUTS OUTPUTS
OE
1
OE
2
A
n
Y
n
L
L
X
H
L
L
H
X
L
H
X
X
L
H
Z
Z
Fig.4 Functional diagram.
Fig.5 Logic diagram.
Page 5
December 1990 5
Philips Semiconductors Product specification
Octal Schmitt trigger buffer/line driver; 3-state 74HC/HCT7541
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Transfer characteristics are given below (not applicable for OEn inputs).
Output capability: bus driver
ICCcategory: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr=tf= 6 ns; CL= 50 pF
TRANSFER CHARACTERISTICS FOR 74HC
Voltages are referred to GND (ground = 0 V)
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
Anto Y
n
39
14
11
120
24
20
150
30
26
180
36
32
ns 2.0
4.5
6.0
Fig.8
t
PZH
/ t
PZL
3-state output enable time
OEnto Y
n
44
16
13
160
32
27
200
40
34
240
48
41
ns 2.0
4.5
6.0
Fig.8
t
PHZ
/ t
PLZ
3-state output disable time
OEnto Y
n
58
21
17
160
32
27
200
40
34
240
48
41
ns 2.0
4.5
6.0
Fig.8
t
THL
/ t
TLH
output transition time 14
5
4
60
12
10
75
15
13
90
18
15
ns 2.0
4.5
6.0
Fig.8
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
V
T+
positive-going threshold 1.50
3.15
4.20
1.50
3.15
4.20
1.50
3.15
4.20
V 2.0
4.5
6.0
Figs 6 and 7
V
T−
negative-going threshold 0.30
1.35
1.80
0.30
1.35
1.80
0.30
1.35
1.80
V 2.0
4.5
6.0
Figs 6 and 7
V
H
hysteresis (VT+− VT−) 0.10
0.25
0.30
0.20
0.40
0.50
0.10
0.25
0.30
0.10
0.25
0.30
V 2.0
4.5
6.0
Figs 6 and 7
Page 6
December 1990 6
Philips Semiconductors Product specification
Octal Schmitt trigger buffer/line driver; 3-state 74HC/HCT7541
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Transfer characteristics are given below (not applicable for OEn inputs).
Output capability: bus driver
ICCcategory: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆I
CC
per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r=tf
= 6 ns; CL= 50 pF
TRANSFER CHARACTERISTICS FOR 74HCT
Voltages are referred to GND (ground = 0 V)
INPUT UNIT LOAD COEFFICIENT
OE
1
OE
2
A
n
1.30
1.30
0.20
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS+25 −40 to +85 −40 to +125
min typ. max min. max min. max.
t
PHL
/ t
PLH
propagation delay
Anto Y
n
19 32 40 48 ns 4.5 Fig.8
t
PZH
/ t
PZL
3-state output enable time
OEnto Y
n
18 32 40 48 ns 4.5 Fig.8
t
PHZ
/ t
PLZ
3-state output disable time
OEnto Y
n
20 32 40 48 ns 4.5 Fig.8
t
THL
/ t
TLH
output transition time 5 12 15 18 ns 4.5 Fig.8
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
V
T+
positive-going threshold 2.0
2.1
2.0
2.1
2.0
2.1
V 4.5
5.5
Figs 6 and 7
V
T−
negative-going threshold 0.70
0.80
0.64
0.74
0.60
0.70
V 4.5
5.5
Figs 6 and 7
V
H
hysteresis (VT+− VT−) 0.17
0.17
0.23
0.23
V 4.5
5.5
Figs 6 and 7
Page 7
December 1990 7
Philips Semiconductors Product specification
Octal Schmitt trigger buffer/line driver; 3-state 74HC/HCT7541
TRANSFER CHARACTERISTIC WAVEFORMS
Fig.6 Transfer characteristic.
handbook, halfpage
MBA325
V
T
V
T
V
H
V
I
V
O
Fig.7 Waveforms showing the definition of VT+,
VT−and VH.
AC WAVEFORMS
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
Fig.8 Waveforms showing the input (An) to output (Yn) propagation delays and the output transition times.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: V
M
= 1.3 V; VI= GND to 3 V.
Fig.9 Waveforms showing the 3-state enable and disable times.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: V
M
= 1.3 V; VI= GND to 3 V.
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