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INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT688
8-bit magnitude comparator
Product specification
File under Integrated Circuits, IC06
December 1990
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Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
FEATURES
• Compare two 8-bit words
• Output capability: standard
• I CCcategory: MSI
GENERAL DESCRIPTION
The 74HC/HCT688 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT688 are 8-bit magnitude comparators.
They perform comparison of two 8-bit binary or BCD
words.
The output provides P = Q.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; t r=tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL/ tPLH
C
I
C
PD
propagation delay CL= 15 pF; VCC=5 V
, Qnto P = Q 1 71 7n s
P
n
E to
P = Q 8 12 ns
input capacitance 3.5 3.5 pF
power dissipation capacitance per package notes 1 and 2 30 30 pF
Notes
1. C
is used to determine the dynamic power dissipation (PD in µ W):
PD
PD=CPD× V
2
× fi+ ∑ (CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
TYPICAL
UNIT
HC HCT
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
December 1990 2
.
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Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1
2, 4, 6, 8, 11, 13, 15, 17 P
3, 5, 7, 9, 12, 14, 16, 18 Q
10 GND ground (0 V)
19
20 V
E enable input (active LOW)
to P
0
to Q
0
7
7
word inputs
word inputs
P = Q equal to output
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
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Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
Fig.4 Functional diagram. Fig.5 Logic diagram.
FUNCTION TABLE
INPUTS OUTPUT
DATA Pn, Q
P=Q
P> Q
P< Q
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
December 1990 4
n
X
ENABLE E P = Q
L
H
L
L
L
H
H
H
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Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
= 6 ns; CL= 50 pF
r=tf
SYMBOL PARAMETER
t
PHL
/ t
propagation delay
PLH
Pn, Qn to P = Q
t
PHL
/ t
propagation delay
PLH
E to P = Q
t
THL
/ t
output transition time 19
TLH
(° C)
T
amb
74HC
min. typ. max. min. max. min. max.
55
20
16
28
10
8
7
6
170
34
29
120
24
20
75
15
13
215
43
37
150
30
26
95
19
16
255
51
43
180
36
31
110
22
19
.
UNIT
ns
ns
ns
TEST CONDITIONS
V
CC
WAVEFORMS+25 −40 to +85 −40 to +125
(V)
2.0
Fig.6
4.5
6.0
2.0
Fig.7
4.5
6.0
2.0
Figs 6 and 7
4.5
6.0
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Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ I
) for a unit load of 1 is given in the family specifications.
CC
To determine ∆ ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT UNIT LOAD COEFFICIENT
P
n
Q
n
E
0.35
0.35
0.70
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
= 6 ns; CL= 50 pF
r=tf
T
amb
(° C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
V
(V)
min. typ. max. min. max. min. max.
t
PHL
/ t
propagation delay
PLH
20 34 43 51 ns 4.5 Fig.6
Pn, Qn to P = Q
t
PHL
/ t
propagation delay
PLH
18 24 30 36 ns 4.5 Fig.7
E to P = Q
t
THL
/ t
output transition time 7 15 19 22 ns 4.5 Figs 6 and 7
TLH
CC
WAVEFORMS+25 −40 to +85 −40 to +125
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Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
AC WAVEFORMS
(1) HC : VM= 50%; VI= GND to VCC.
= 1.3 V; VI= GND to 3 V.
HCT: V
M
Fig.6 Waveforms showing the enable input (E) to
the equal to output (P = Q) propagation
delays and the output transition times.
(1) HC : VM= 50%; VI= GND to VCC.
= 1.3 V; VI= GND to 3 V.
HCT: V
M
Fig.7 Waveforms showing the word inputs (Pn, Qn)
to the equal to output (P = Q) propagation
delays and the output transition times.
APPLICATION INFORMATION
Two or more “688” 8-bit magnitude comparators may be cascaded to compare binary or BCD numbers of more than 8
bits. An example is shown in Fig.8.
Fig.8 Binary or BCD comparator.
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
December 1990 7