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INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT640
Octal bus transceiver; 3-state;
inverting
Product specification
File under Integrated Circuits, IC06
March 1988
Page 2
Philips Semiconductors Product specification
Octal bus transceiver; 3-state; inverting 74HC/HCT640
FEATURES
• Octal bidirectional bus interface
• Inverting 3-state outputs
• Output capability: bus driver
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT640 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT640 are octal transceivers featuring
inverting 3-state bus compatible outputs in both send and
receive directions.
The “640” features an output enable (OE) input for easy
cascading and a send/receive (DIR) for direction control.
OE controls the outputs so that the buses are effectively
isolated. The “640” is similar to the “245” but has inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf=6ns
amb
SYMBOL PARAMETER CONDITIONS
t
t
PHL
/
PLH
propagation delay
CL= 15 pF; VCC= 5 V 9 9 ns
An to Bn;
Bn to A
n
C
I
C
I/O
C
PD
input capacitance 3.5 3.5 pF
input/output capacitance 10 10 pF
power dissipation capacitance
notes 1 and 2 35 35 pF
per transceiver
TYPICAL
UNIT
HC HCT
Notes
1. C
is used to determine the dynamic power dissipation (PD in µW):
PD
PD=CPD× V
2
× fi+ ∑ (CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
“74HC/HCT/HCU/HCMOS Logic Package Information”
See
March 1988 2
.
Page 3
Philips Semiconductors Product specification
Octal bus transceiver; 3-state; inverting 74HC/HCT640
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1 DIR direction control
2, 3, 4, 5, 6, 7, 8, 9 A
10 GND ground (0 V)
18, 17, 16, 15, 14, 13, 12, 11 B
19
20 V
to A7data inputs/outputs
0
to B7data inputs/outputs
0
OE output enable input (active LOW)
CC
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol.
FUNCTION TABLE
inputs inputs/outputs
OE DIR A
L
L
H
L
H
X
n
A=B
inputs
Z
B
n
inputs
B=A
Z
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.3 IEC logic symbol. Fig.4 Functional diagram.
March 1988 3
Page 4
Philips Semiconductors Product specification
Octal bus transceiver; 3-state; inverting 74HC/HCT640
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
Output capability: bus driver
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
= 6 ns; CL=50pF
r=tf
SYMBOL PARAMETER
t
PHL
/ t
propagation delay
PLH
Anto Bn;
Bn to A
n
t
PZH
/ t
3-state output enable time
PZL
OE, DIR to An;
t
PHZ
OE, DIR to B
/ t
3-state output disable time
PLZ
n
OE, DIR to An;
t
THL
OE, DIR to B
/ t
output transition time 14
TLH
n
(°C)
T
amb
74HC
min. typ. max. min. max. min. max.
30
11
9
44
16
13
50
18
14
5
4
90
18
15
150
30
26
150
30
26
60
12
10
115
23
20
190
38
33
190
38
33
75
15
13
135
27
23
225
45
38
225
45
38
90
18
15
.
UNIT
ns 2.0
ns 2.0
ns 2.0
ns 2.0
TEST CONDITIONS
V
CC
WAVEFORMS+25 −40 to +85 −40 to +125
(V)
Fig.5
4.5
6.0
Fig.6
4.5
6.0
Fig.6
4.5
6.0
Fig.5
4.5
6.0
March 1988 4
Page 5
Philips Semiconductors Product specification
Octal bus transceiver; 3-state; inverting 74HC/HCT640
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: bus driver
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆I
) for a unit load of 1 is given in the family specifications.
CC
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT UNIT LOAD COEFFICIENT
A
n
B
n
OE
DIR
1.50
1.50
1.50
0.90
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr=tf= 6 ns; CL=50pF
T
amb
(°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
V
(V)
min. typ. max. min. max. min. max.
t
PHL
/ t
propagation delay
PLH
11 22 28 33 ns 4.5 Fig.5
Anto Bn;
Bn to A
n
t
PZH
/ t
3-state output enable time
PZL
18 30 38 45 ns 4.5 Fig.6
OE, DIR to An;
t
PHZ
OE, DIR to B
/ t
3-state output disable time
PLZ
n
19 30 38 45 ns 4.5 Fig.6
OE, DIR to An;
t
THL
OE, DIR to B
/ t
output transition time 5 12 15 18 ns 4.5 Fig.5
TLH
n
CC
WAVEFORMS+25 −40 to +85 −40 to +125
March 1988 5
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Philips Semiconductors Product specification
Octal bus transceiver; 3-state; inverting 74HC/HCT640
AC WAVEFORMS
(1) HC : VM = 50%; VI= GND to VCC.
= 1.3 V; VI= GND to 3 V.
HCT: V
M
Fig.5 Waveforms showing the input (An, Bn) to
output (Bn, An) propagation delays and the
output transition times.
(1) HC : VM = 50%; VI= GND to VCC.
= 1.3 V; VI= GND to 3 V.
HCT: V
M
Fig.6 Waveforms showing the 3-state enable and
disable times.
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
March 1988 6
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