Datasheet 74 hct583 DATASHEETS (Philips)

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Page 1

INTEGRATED CIRCUITS

DATA SH EET

For a complete data sheet, please also download:

•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT583

4-bit full adder with fast carry

Product speciﬁcation Supersedes data of December 1990 File under Integrated Circuits, IC06

1998 Mar 31

Page 2

Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

FEATURES

• Adds two decimal numbers

• Full internal look-ahead

• Fast ripple carry for economical expansion

• Output capability: standard driver

• ICC category: MSI

The “583” generates the decimal sum outputs (∑ and a carry output (C

If an addition of two BCD numbers produce a number greater than 9, a valid BCD number and a carry will result. For input values larger than 9, the number is converted from binary to BCD. Binary to BCD conversion occurs by grounding one set of inputs, An or Bn and applying a 4-bit binary number to the other set of inputs. If the input is between 0 and 9, a BCD number occurs at the output.

GENERAL DESCRIPTION

The 74HC/HCT583 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JECEC standard no. 7A.

If the binary input falls between 10 and 15, a carry term is generated. Both the carry term and the sum are the BCD equivalent of the binary input. Converting binary numbers greater than 16 may be achieved by cascading “583s”.

See the “283” for the binary version.

The 74HC/HCT583 are high-speed 4-bit BCD full adders with internal carry look-ahead. They accept two 4-bit decimal numbers (A

to A3 and B0 to B3) and a carry input

(CIN).

QUICK REFERENCE DATA

GND = 0 V; T

=25°C; tr=tf=6ns

amb

SYMBOL PARAMETER CONDITIONS

PHL/ tPLH

propagation delay CL= 15 pF; VCC=5V

to C

n+4

, Bn to C

n+4

input capacitance 3.5 3.5 pF power dissipation capacitance per package notes 1 and 2 116 120 pF

) if the sum is greater than 9.

n+4

TYPICAL

HC HCT

20 23 ns 23 27 ns

to ∑3)

UNIT

Notes

1. C

is used to determine the dynamic power dissipation (PD in µW):

PD=CPD× V

× fi+ ∑ (CL× V

× fo) where:

fi= input frequency in MHz fo= output frequency in MHz ∑ (CL× V

× fo) = sum of outputs

CL= output load capacitance in pF VCC= supply voltage in V

2. For HC the condition is VI= GND to V

For HCT the condition is VI= GND to VCC− 1.5 V

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Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

74HC583 DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 74HC583 SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HCT583 DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1 74HCT583 SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

PIN DESCRIPTION

PIN NO. SYMBOL NAME AND FUNCTION

5C 6C

IN n+4

carry input

carry output 8 GND ground (0 V) 11, 10, 7, 9 ∑ 12, 1, 2, 3 B 13, 14, 15, 4 A 16 V

to ∑

to B

to A

0 CC

sum outputs

B operand inputs

A operand inputs

positive supply voltage

handbook, halfpage

B B B A

n + 4

∑

GND

583

5 6 7 8

MGM851

∑

andbook, halfpage

handbook, halfpage

13 12 14 1 15 2

11 10

∑

n + 4

MGM852

Fig.2 Logic symbol.

Fig.1 Pin configuration.

13 14 15

1 2 3 5

∑

(BCD)

3 0

∑

C0C1

MGM853

10 7 9

Fig.3 IEC logic symbol.

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Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

handbook, halfpage

A 13 12 14 1 15 2

11 10

∑

∑2∑

Fig.4 Functional diagram.

MGM854

n + 4

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Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

handbook, full pagewidth

CIN

Fig.5 Logic diagram.

1998 Mar 31 5

MGM856

n + 4

Page 6

Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

DC CHARACTERISTICS FOR 74HC

For the DC characteristics see

“74HC/HCT/HCU/HCMOS Logic Family Specifications”

Output capability: standard ICCcategory: MSI

AC CHARACTERISTICS FOR 74HC

GND = 0 V; t

= 6 ns; CL=50pF

r=tf

SYMBOL PARAMETER

min. typ. max. min. max. min. max.

PHL

/ t

propagation delay

PLH

CIN to ∑

propagation delay

PLH

CIN to ∑

propagation delay

PLH

CIN to ∑

propagation delay

PLH

CIN to ∑

propagation delay

PLH

An or Bn to ∑

propagation delay

PLH

An or Bn to ∑

propagation delay

PLH

An or Bn to ∑

propagation delay

PLH

An or Bn to ∑

propagation delay

PLH

CIN to C

propagation delay

PLH

An to C

n+4

amb

(°C)

TEST CONDITIONS

74HC

+25 −40 to +85 −40 to +125

UNIT

WAVEFORMS

(V)

50 155 195 235 ns 2.0 Fig.6 18 31 39 47 4.5 14 26 33 40 6.0 113 350 440 525 ns 2.0 Fig.6 41 70 88 105 4.5 33 60 75 90 6.0 100 305 380 460 ns 2.0 Fig.6 36 61 76 92 4.5 29 52 65 78 6.0 110 340 425 510 ns 2.0 Fig.6 40 68 85 102 4.5 32 58 72 87 6.0 50 155 195 235 ns 2.0 Fig.6 18 31 39 47 4.5 14 26 33 40 6.0 120 365 455 550 ns 2.0 Fig.6 43 73 91 110 4.5 34 62 77 94 6.0 105 325 405 490 ns 2.0 Fig.6 38 65 81 98 4.5 30 55 69 83 6.0 116 355 445 535 ns 2.0 Fig.6 42 71 89 107 4.5 34 60 76 91 6.0 63 195 245 295 ns 2.0 Fig.6 23 39 49 59 4.5 18 33 42 50 6.0 72 220 275 330 ns 2.0 Fig.6 26 44 55 66 4.5 21 37 47 56 6.0

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Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

amb

(°C)

TEST CONDITIONS

74HC

SYMBOL PARAMETER

PHL

/ t

propagation delay

PLH

Bn to C

n+4

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

74 230 290 345 ns 2.0 Fig.6 27 46 58 69 4.5

UNIT

(V)

22 39 49 59 6.0

THL

/ t

output transition time

TLH

standard outputs

19 75 95 110 ns 2.0 Fig.6 7 15 19 22 4.5 6 13 16 19 6.0

DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see

“74HC/HCT/HCU/HCMOS Logic Family Specifications”

Output capability: standard ICCcategory: MSI

Note to HCT types

The value of additional quiescent supply current (∆I

) for a unit load of 1 is given in the family specifications.

To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.

WAVEFORMS

INPUT UNIT LOAD COEFFICIENT

, B

0.4

1.5

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Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; t

SYMBOL PARAMETER

/ t

PHL

PLH

/ t

PHL

PLH

/ t

PHL

PLH

/ t

PHL

PLH

/ t

PHL

PLH

/ t

PHL

PLH

/ t

PHL

PLH

/ t

PHL

PLH

/ t

PHL

PLH

/ t

PHL

PLH

/ t

PHL

PLH

/ t

THL

TLH

= 6 ns; CL=50pF

r=tf

propagation delay

CIN to ∑

propagation delay

CIN to ∑

propagation delay

CIN to ∑

propagation delay

CIN to ∑

propagation delay

An or Bn to ∑

propagation delay

An or Bn to ∑

propagation delay

An or Bn to ∑

propagation delay

An or Bn to ∑

propagation delay

CIN to C

n+4

propagation delay

An to C

n+4

propagation delay

Bn to C

n+4

output transition time

standard outputs

(°C)

amb

74HCT

UNIT

+25 −40 to +85 −40 to +125

min. typ. max. min. max. min. max.

20 34 43 51 ns 4.5 Fig.6

40 68 85 102 ns 4.5 Fig.6

38 65 81 98 ns 4.5 Fig.6

22 37 46 56 ns 4.5 Fig.6

43 73 91 110 ns 4.5 Fig.6

40 68 85 102 ns 4.5 Fig.6

41 70 88 105 ns 4.5 Fig.6

27 46 58 69 ns 4.5 Fig.6

31 53 66 80 ns 4.5 Fig.6

30 51 64 77 ns 4.5 Fig.6

7 15 19 22 ns 4.5 Fig.6

TEST CONDITIONS

WAVEFORMS

(V)

1998 Mar 31 8

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Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

AC WAVEFORMS

ook, full pagewidth

(1) HC: V

HCT: V

= 50%; VI= GND to VCC.

= 1.3 V; VI= GND to 3 V.

CIN, An, B

INPUT

∑n, C

n + 4

OUTPUT

THL

(1)

PHL

(1)

Fig.6 Waveforms showing the inputs (CIN, An, Bn) to the outputs (∑n, C

transition times.

PLH

MGM855

TLH

) propagation delays and the output

n+4

1998 Mar 31 9

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Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

PACKAGE OUTLINES

DIP16: plastic dual in-line package; 16 leads (300 mil); long body

seating plane

pin 1 index

w M

SOT38-1

(e )

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

UNIT

inches

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

max.

4.7 0.51 3.7

OUTLINE VERSION

SOT38-1

min.

1 2

max.

0.15

IEC JEDEC EIAJ

050G09 MO-001AE

1.40

1.14

0.055

0.045

0.53

0.38

0.021

0.015

cEe M

0.32

0.23

0.013

0.009

REFERENCES

(1) (1)

21.8

21.4

0.86

0.84

1998 Mar 31 10

6.48

6.20

0.26

0.24

0.30

0.15

0.13

3.9

3.4

8.25

7.80

0.32

0.31

EUROPEAN

PROJECTION

9.5

0.2542.54 7.62

8.3

0.37

0.010.100.0200.19

0.33

ISSUE DATE

92-10-02 95-01-19

(1)

max.

2.2

0.087

Page 11

Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

SO16: plastic small outline package; 16 leads; body width 3.9 mm

pin 1 index

w M

SOT109-1

detail X

v M

(A )

0 2.5 5 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

max.

1.75

0.069

OUTLINE

VERSION

SOT109-1

A2A

0.25

0.10

0.010

0.004

1.45

1.25

0.057

0.049

0.25

0.01

IEC JEDEC EIAJ

076E07S MS-012AC

0.49

0.36

0.019

0.014

0.25

0.19

0.0100

0.0075

(1)E(1) (1)

10.0

4.0

3.8

0.16

0.15

1.27

0.050

9.8

0.39

0.38

REFERENCES

1998 Mar 31 11

eHELLpQZywv θ

1.05

0.041

1.0

0.4

0.039

0.016

0.7

0.25

0.6

0.028

0.01 0.004

0.020

EUROPEAN

PROJECTION

0.25 0.1

0.01

0.7

0.3

0.028

0.012

ISSUE DATE

95-01-23 97-05-22

6.2

5.8

0.244

0.228

Page 12

Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

SOLDERING Introduction

There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used.

This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our

“Data Handbook IC26; Integrated Circuit Packages”

(order code 9398 652 90011).

DIP

OLDERING BY DIPPING OR BY WAVE

The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds.

The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T

stg max

). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds.

REFLOW SOLDERING Reflow soldering techniques are suitable for all SO

packages.

Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C.

Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C.

AVE SOLDERING

W Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used.

• The longitudinal axis of the package footprint must be parallel to the solder flow.

• The package footprint must incorporate solder thieves at the downstream end.

During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.

Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.

EPAIRING SOLDERED JOINTS

Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.

Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.

1998 Mar 31 12

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Philips Semiconductors Product speciﬁcation

4-bit full adder with fast carry 74HC/HCT583

DEFINITIONS

Data sheet status

Objective speciﬁcation This data sheet contains target or goal speciﬁcations for product development. Preliminary speciﬁcation This data sheet contains preliminary data; supplementary data may be published later. Product speciﬁcation This data sheet contains ﬁnal product speciﬁcations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

1998 Mar 31 13