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INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT541
Octal buffer/line driver; 3-state
Product specification
File under Integrated Circuits, IC06
December 1990
Page 2
Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT541
FEATURES
• Non-inverting outputs
• Output capability: bus driver
• ICC category: MSI
The 74HC/HCT541 are octal non-inverting buffer/line
drivers with 3-state outputs. The 3-state outputs are
controlled by the output enable inputs
A HIGH on OEncauses the outputs to assume a high
impedance OFF-state.
The “541” is identical to the “540” but has non-inverting
outputs.
GENERAL DESCRIPTION
The 74HC/HCT541 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
= 25 °C; tr= tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL
C
C
I
PD
/ t
PLH
propagation delay Anto Y
n
CL= 15 pF; VCC= 5 V 10 12 ns
input capacitance 3.5 3.5 pF
power dissipation capacitance per buffer notes 1 and 2 37 39 pF
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW):
PD
PD= CPD× V
2
× fi+∑(CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
OE1and OE2.
TYPICAL
UNIT
HC HCT
ORDERING INFORMATION
“74HC/HCT/HCU/HCMOS Logic Package Information”
See
December 1990 2
.
Page 3
Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT541
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 19
2, 3, 4, 5, 6, 7, 8, 9 A
10 GND ground (0 V)
18, 17, 16, 15, 14, 13, 12, 11 Y
20 V
OE1, OE
to A
0
to Y
0
CC
2
7
7
output enable input (active LOW)
data inputs
bus outputs
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
December 1990 3
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Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT541
FUNCTION TABLE
INPUTS OUTPUT
Fig.4 Functional diagram.
OE
H
1
L
L
X
OE
H
X
2
L
L
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
A
n
L
H
X
X
Y
n
L
H
Z
Z
Fig.5 Logic diagram.
December 1990 4
Page 5
Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT541
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
Output capability: bus driver
ICCcategory: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
= tf= 6 ns; CL= 50 pF
r
SYMBOL PARAMETER
t
PHL
t
PZH
/ t
/ t
propagation delay
PLH
Anto Y
3-state output
PZL
n
enable time
t
PHZ
OE to Y
/ t
3-state output
PLZ
n
disable time
t
THL
OE to Y
/ t
output transition time 14
TLH
n
(°C)
T
amb
74HC
min. typ. max. min. max. min. max.
33
12
10
55
20
16
61
22
18
5
4
115
23
20
160
32
27
160
32
27
60
12
10
145
29
25
200
40
34
200
40
34
75
15
13
175
35
30
240
48
41
240
48
41
90
18
15
.
UNIT
ns 2.0
ns 2.0
ns 2.0
ns 2.0
TEST CONDITIONS
V
CC
WAVEFORMS+25 −40 to +85 −40 to +125
(V)
Fig.6
4.5
6.0
Fig.7
4.5
6.0
Fig.7
4.5
6.0
Fig.6
4.5
6.0
December 1990 5
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Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT541
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: bus driver
ICCcategory: MSI
Note to HCT types
The value of additional quiescent supply current (∆I
) for a unit load of 1 is given in the family specifications.
CC
To determine ∆ICCper input, multiply this value by the unit load coefficient shown in the table below.
INPUT UNIT LOAD COEFFICIENT
OE
OE
A
1
2
n
1.50
1.00
0.70
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
= tf= 6 ns; CL= 50 pF
r
T
amb
(°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
V
(V)
min. typ. max. min. max. min. max.
t
PHL
t
PZH
t
PHZ
t
THL
/ t
/ t
/ t
/ t
propagation delay
PLH
Anto Y
n
3-state output enable time
PZL
OE to Y
3-state output disable time
PLZ
OE to Y
output transition time
TLH
n
n
15 28 35 42 ns 4.5 Fig.6
21 35 44 53 ns 4.5 Fig.7
21 35 44 53 ns 4.5 Fig.7
5 12 15 18 ns 4.5 Fig.6
CC
WAVEFORMS+25 −40 to +85 −40 to +125
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Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT541
AC WAVEFORMS
(1) HC : VM= 50%; VI= GND to VCC.
= 1.3 V; VI= GND to 3 V.
HCT: V
M
Fig.6 Waveforms showing the input (An) to output (Yn) propagation delays and the output transition times.
(1) HC : VM= 50%; VI= GND to VCC.
= 1.3 V; VI= GND to 3 V.
HCT: V
M
Fig.7 Waveforms showing the 3-state enable and disable times.
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
December 1990 7
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