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INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT253
Dual 4-input multiplexer; 3-state
Product specification
File under Integrated Circuits, IC06
December 1990
Page 2
Philips Semiconductors Product specification
Dual 4-input multiplexer; 3-state 74HC/HCT253
FEATURES
• Non-inverting data path
• 3-state outputs for bus interface
• and multiplex expansion
• Common select inputs
• Separate output enable inputs
• Output capability: bus driver
• ICC category: MSI
The 74HC/HCT253 have two identical 4-input multiplexers
with 3-state outputs which select two bits from four sources
selected by common data select inputs (S
When the individual output enable (1OE, 2OE) inputs of
the 4-input multiplexers are HIGH, the outputs are forced
to the high impedance OFF-state. The “253” is the logic
implementation of a 2-pole, 4-position switch, where the
position of the switch is determined by the logic levels
applied to S0and S1.
The logic equations for the outputs are:
1Y=1OE(1l0.S1.S0+1I1.S1.S0+1I2.S1.S0+1I3.S1.S0)
GENERAL DESCRIPTION
The 74HC/HCT253 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
2Y=2OE(2l0.S1.S0+2I1.S1.S0+2I2.S1.S0+2I3.S1.S0)
APPLICATIONS
• Data selectors
• Data multiplexers
QUICK REFERENCE DATA
GND = 0 V; T
= 25 °C; tr= tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL
C
C
I
PD
/ t
PLH
propagation delay CL= 15 pF; VCC= 5 V
1I
, 2Into nY; 17 17 ns
n
to nY 18 19 ns
S
n
input capacitance 3.5 3.5 pF
power dissipation capacitance per multiplexer notes 1 and 2 55 55 pF
0,S1
TYPICAL
HC HCT
).
UNIT
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW):
PD
PD= CPD× V
2
× fi+∑(CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
“74HC/HCT/HCU/HCMOS Logic Package Information”
See
December 1990 2
.
Page 3
Philips Semiconductors Product specification
Dual 4-input multiplexer; 3-state 74HC/HCT253
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1, 15 1
14, 2 S
7, 9 1Y, 2Y 3-state multiplexer outputs
8 GND ground (0 V)
6, 5, 4, 3 1I
10, 11, 12, 13 2I
16 V
OE, 2OE output enable inputs (active LOW)
0,S1
to 1I
0
to 2I
0
CC
3
3
common data select inputs
data inputs from source 1
data inputs from source 2
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
December 1990 3
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Philips Semiconductors Product specification
Dual 4-input multiplexer; 3-state 74HC/HCT253
Fig.4 Functional diagram.
Fig.5 Logic diagram.
FUNCTION TABLE
SELECT INPUTS DATA INPUTS OUTPUT ENABLE OUTPUT
S
0
S
1
nI
0
nI
1
nI
2
nI
nOE nY
3
XXXXXXH Z
L
L
H
H
L
L
H
H
L
L
L
L
H
H
H
H
L
H
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
L
H
X
X
X
X
X
X
X
X
L
H
L
L
L
L
L
L
L
L
L
H
L
H
L
H
L
H
NOTES
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
December 1990 4
Page 5
Philips Semiconductors Product specification
Dual 4-input multiplexer; 3-state 74HC/HCT253
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
Output capability: bus driver
ICCcategory: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
= tf= 6 ns; CL= 50 pF
r
SYMBOL PARAMETER
t
PHL
/ t
propagation delay
PLH
1Into nY;
2Into nY
t
PHL
/ t
propagation delay
PLH
Snto nY
t
PZH
/ t
3-state output enable time
PZL
nOE to nY
t
PHZ
/ t
3-state output disable time
PLZ
nOE to nY
t
THL
/ t
output transition time 14
TLH
(°C)
T
amb
74HC
+25 −40 to +85 −40
to +125
min. typ. max. min. max. min. max.
55
20
16
58
21
17
30
11
9
41
15
12
5
4
175
35
30
175
35
30
100
20
17
150
30
26
60
12
10
220
44
37
220
44
37
125
25
21
190
38
33
75
15
13
265
53
45
265
53
45
150
30
26
225
45
38
90
18
15
.
UNIT
ns 2.0
ns 2.0
ns 2.0
ns 2.0
ns 2.0
TEST CONDITIONS
WAVEFORMS
V
CC
(V)
Fig.6
4.5
6.0
Fig.6
4.5
6.0
Fig.7
4.5
6.0
Fig.7
4.5
6.0
Fig.6
4.5
6.0
December 1990 5
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Philips Semiconductors Product specification
Dual 4-input multiplexer; 3-state 74HC/HCT253
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: bus driver
ICCcategory: MSI
Note to HCT types
The value of additional quiescent supply current (∆I
) for a unit load of 1 is given in the family specifications.
CC
To determine ∆ICCper input, multiply this value by the unit load coefficient shown in the table below.
INPUT UNIT LOAD COEFFICIENT
1I
n
2I
n
nOE
S
0
S
1
0.40
0.40
1.10
1.10
1.10
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
= tf= 6 ns; CL= 50 pF
r
T
amb
(°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
+25 −40 to +85 −40 to +125
UNIT
V
min. typ. max. min. max. min. max.
t
PHL
/ t
propagation delay
PLH
20 38 48 57 ns 4.5 Fig.6
1Into nY;
2Into nY
t
PHL
/ t
propagation delay
PLH
22 40 50 60 ns 4.5 Fig.6
Snto nY
t
PZH
/ t
3-state output enable time
PZL
14 30 38 45 ns 4.5 Fig.7
nOE to nY
t
PHZ
/ t
3-state output disable time
PLZ
13 30 38 45 ns 4.5 Fig.7
nOE to nY
t
THL
/ t
output transition time 5 12 15 18 ns 4.5 Fig.6
TLH
WAVEFORMS
CC
(V)
December 1990 6
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Philips Semiconductors Product specification
Dual 4-input multiplexer; 3-state 74HC/HCT253
AC WAVEFORMS
(1) HC : VM= 50%; VI= GND to VCC.
HCT: VM= 1.3 V; VI= GND to 3 V.
Fig.6 Waveforms showing the input (1In,2In) to output (1Y, 2Y) propagation delays and the output transition
times.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: VM= 1.3 V; VI= GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and disable times.
PACKAGE OUTLINES
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
See
.
December 1990 7
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