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INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT241
Octal buffer/line driver; 3-state
Product specification
File under Integrated Circuits, IC06
September 1993
Page 2
Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT241
FEATURES
• Output capability: bus driver
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT241 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT241 are octal non-inverting buffer/line
drivers with 3-state outputs. The 3-state outputs are
controlled by the output enable inputs 1OE and 2OE.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf= 6 ns
amb
SYMBOL PARAMETER CONDITIONS
t
PHL
/ t
propagation delay
PLH
CL= 15 pF; VCC= 5 V 7 11 ns
1An to 1Yn;
2An to 2Y
C
I
C
PD
input capacitance 3.5 3.5 pF
power dissipation capacitance per buffer notes 1 and 2 30 30 pF
n
Notes
1. C
is used to determine the dynamic power dissipation (PD in µW):
PD
PD=CPD× V
2
× fi+∑(CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
2
× fo) = sum of outputs
CC
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
TYPICAL
UNIT
HC HCT
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
September 1993 2
.
Page 3
Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT241
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
11
2, 4, 6, 8 1A
3, 5, 7, 9 2Y
10 GND ground (0 V)
17, 15, 13, 11 2A
18, 16, 14, 12 1Y
19 20E output enable input (active HIGH)
20 V
OE output enable input (active LOW)
0
0
0
0
CC
to 1A
to 2Y
to 2A
to 1Y
3
3
3
3
data inputs
bus outputs
data inputs
bus outputs
positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol
September 1993 3
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Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT241
FUNCTION TABLES
INPUTS OUTPUT
OE 1A
1
L
L
H
L
H
X
INPUTS OUTPUT
20E 2A
H
H
L
L
H
X
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
n
1Y
n
L
H
Z
n
2Y
n
L
H
Z
September 1993 4
Fig.4 Functional diagram.
Page 5
Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT241
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
Output capability: bus driver
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
= 6 ns; CL= 50 pF
r=tf
SYMBOL PARAMETER
t
PHL
/ t
propagation delay
PLH
1An to 1Yn;
t
PZH
2An to 2Y
/ t
3-state output enable time
PZL
n
1OE to 1Yn;
t
PHZ
2OE to 2Y
/ t
3-state output disable time
PLZ
n
1OE to 1Yn;
t
THL
2OE to 2Y
/ t
output transition time 14
TLH
n
(°C)
T
amb
74HC
+25 −40 to +85 −40 to +125
typ. max. min. max. min. max.
min.
25
9
7
30
11
9
39
14
11
5
4
100
20
17
150
30
26
150
30
26
60
12
10
125
25
21
190
38
33
190
38
33
75
15
13
150
30
26
225
45
38
225
45
38
90
18
15
.
UNIT
ns 2.0
ns 2.0
ns 2.0
ns 2.0
TEST CONDITIONS
WAVEFORMS
V
CC
(V)
Fig.5
4.5
6.0
Fig.6
4.5
6.0
Fig.6
4.5
6.0
Fig.5
4.5
6.0
September 1993 5
Page 6
Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT241
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: bus driver
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆I
) for a unit load of 1 is given in the family specifications.
CC
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT UNIT LOAD COEFFICIENT
1A
2A
1OE
2OE
n
n
0.70
0.70
0.70
1.50
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr=tf= 6 ns; CL= 50 pF
T
amb
(°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
t
PHL
/ t
propagation delay
PLH
+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
13 22 28 33 ns 4.5 Fig.5
UNIT
V
(V)
CC
1An to 1Yn;
t
PZH
2An to 2Y
/ t
3-state output enable time
PZL
n
15 30 38 45 ns 4.5 Fig.6
1OE to 1Yn;
t
PHZ
2OE to 2Y
/ t
3-state output disable time
PLZ
n
18 30 38 45 ns 4.5 Fig.6
1OE to 1Yn;
t
THL
2OE to 2Y
/ t
output transition time 5 12 15 18 ns 4.5 Fig.5
TLH
n
WAVEFORMS
September 1993 6
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Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT241
AC WAVEFORMS
(1) HC : VM= 50%; VI= GND to VCC.
= 1.3 V; VI= GND to 3 V.
HCT: V
M
Fig.5 Waveforms showing the input (1An, 2An) to output (1Yn, 2Yn) propagation delays and the output transition
times.
(1) HC : VM= 50%; VI= GND to VCC.
= 1.3 V; VI= GND to 3 V.
HCT: V
M
Fig.6 Waveform showing the 3-state enable and disable times for input 1OE.
(1) HC : VM= 50%; VI= GND to VCC.
= 1.3 V; VI= GND to 3 V.
HCT: V
M
Fig.7 Waveform showing the 3-state enable and disable times for input 2OE.
September 1993 7
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Philips Semiconductors Product specification
Octal buffer/line driver; 3-state 74HC/HCT241
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
September 1993 8
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