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74 hct1g86
DATASHEETS (Philips)
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Datasheet 74 hct1g86 DATASHEETS (Philips)

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Page 1
INTEGRATED CIRCUITS
DATA SH EET
74HC1G86; 74HCT1G86
2-input EXCLUSIVE-OR gate
Product specification File under Integrated Circuits, IC06
1998 Aug 05
Page 2
2-input EXCLUSIVE-OR gate

FEATURES

• Wide operating voltage range:
2.0 to 6.0 V
• Symmetrical output impedance
• High noise immunity
• Low power dissipation
• Balanced propagation delays
• Very small 5 pins package
• Output capability: standard.

DESCRIPTION

The 74HC1G/HCT1G86 is a high-speed Si-gate CMOS device.
The 74HC1G/HCT1G86 provides the 2-input EXCLUSIVE-OR function.
The standard output currents are compared to the 74HC/HCT86.

FUNCTION TABLE

See note 1.

QUICK REFERENCE DATA

GND = 0 V; T
Notes
1. C
1
⁄
2
2. For HC1G the condition is VI= GND to VCC;
=25°C; tr=tf=6.0 ns.
amb
SYMBOL PARAMETER CONDITIONS
/ t
t
PHL
PLH
C
I
C
PD
propagation delay inA, inB to outY
CL=15pF
VCC=5V input capacitance 1.5 1.5 pF power dissipation
notes 1 and 2 23 23 pF capacitance
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V
2
× fi+ ∑ (CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz; fo= output frequency in MHz; CL= output load capacitance in pF; VCC= supply voltage in V; ∑ (CL× V
2
× fo) = sum of outputs.
CC
For HCT1G the condition is VI= GND to VCC− 1.5 V.
74HC1G86;
74HCT1G86
TYP.
UNIT
HC1G HCT1G
910ns
INPUTS OUTPUT
inA inB outY
LL L
LH H HL H HH L
Note
1. H = HIGH voltage level; L = LOW voltage level.

PINNING

1 and 2 inB, inA data inputs
PIN SYMBOL DESCRIPTION
3 GND ground (0 V) 4 outY data output 5V
CC
DC supply voltage
1998 Aug 05 2
Page 3
2-input EXCLUSIVE-OR gate
74HC1G86;
74HCT1G86

ORDERING AND PACKAGE INFORMATION

OUTSIDE NORTH
AMERICA
74HC1G86GW 74HCT1G86GW 5 SC-88A plastic SOT353 TH
handbook, halfpage
inB inA
GND
TEMPERATURE
−40 to +125 °C
1 2
86
3
MNA037
RANGE
V
5
outY
4
PINS PACKAGE MATERIAL CODE MARKING
5 SC-88A plastic SOT353 HH
CC
PACKAGES
handbook, halfpage
inB
1
inA
2
outY
MNA038
4
handbook, halfpage
Fig.1 Pin configuration.
1 2
= 1
MNA039
Fig.3 IEC logic symbol.
Fig.2 Logic symbol.
handbook, halfpage
inB
4
inA
outY
MNA040
Fig.4 Logic diagram.
1998 Aug 05 3
Page 4
2-input EXCLUSIVE-OR gate
74HC1G86;
74HCT1G86

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER
V
CC
V
I
V
O
T
amb
DC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V input voltage 0 − V output voltage 0 − V operating ambient
temperature range
t
r,tf
input rise and fall times except for Schmitt-trigger inputs

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
SYMBOL P ARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
±I
IK
±I
OK
±I
O
DC supply voltage −0.5 +7.0 V DC input diode current VI<−0.5 or VI> VCC+ 0.5 V; note 1 − 20 mA DC output diode current VO<−0.5 or VO> VCC+ 0.5 V; note 1 − 20 mA DC output source or sink current
standard outputs
±I
CC
DC VCC or GND current for types with standard outputs
T
stg
P
D
storage temperature range −65 +150 °C power dissipation per package for temperature range: −40 to +125 °C
5 pins plastic SC-88A above +55 °C derate linearly with
74HC1G 74HCT1G
UNIT CONDITIONS
MIN. TYP. MAX. MIN. TYP. MAX.
0 − V
CC
0 − V
CC
CC CC
V V
−40 +25 +125 −40 +25 +125 °C see DC and AC characteristics per device
−−1000 −−−ns VCC= 2.0 V
−−500 −−500 ns V
−−400 −−−ns V
CC CC
= 4.5 V = 6.0 V
−0.5 V < VO< VCC+ 0.5 V; note 1 − 12.5 mA
note 1 − 25 mA
− 200 mW
2.5 mW/K
Note
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Aug 05 4
Page 5
2-input EXCLUSIVE-OR gate
DC CHARACTERISTICS FOR THE 74HC1G
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
T
(°C)
amb
SYMBOL PARAMETER
V
IH
HIGH-level input voltage
V
IL
V
OH
LOW-level input voltage − 0.8 0.5 − 0.5 V 2.0
HIGH-level output voltage; all outputs
V
OH
HIGH-level output voltage; standard outputs
V
OL
LOW-level output voltage; all outputs
V
OL
LOW-level output voltage; standard outputs
I
I
I
CC
input leakage current −− 1.0 − 1.0 µA 6.0 VI=VCCor GND quiescent supply
current
−40 to +85 −40 to +125
MIN. TYP.
(1)
MAX. MIN. MAX.
1.5 1.2 − 1.5 − V 2.0
3.15 2.4 − 3.15 − V 4.5
4.2 3.2 − 4.2 − V 6.0
− 2.1 1.35 − 1.35 V 4.5
− 2.8 1.8 − 1.8 V 6.0
1.9 2.0 − 1.9 − V 2.0 VI=VIHor VIL;
4.4 4.5 − 4.4 − V 4.5
5.9 6.0 − 5.9 − V 6.0
4.13 4.32 − 3.7 − V 4.5 VI=VIHor VIL;
5.63 5.81 − 5.2 − V 6.0 V
− 0 0.1 − 0.1 V 2.0 VI=VIHor VIL;
− 0 0.1 − 0.1 V 4.5
− 0 0.1 − 0.1 V 6.0
− 0.15 0.33 − 0.4 V 4.5 VI=VIHor VIL;
− 0.16 0.33 − 0.4 V 6.0 V
−− 10 − 20 µA 6.0 VI=VCCor GND;
UNIT
74HC1G86;
74HCT1G86
TEST CONDITIONS
VCC(V) OTHER
−IO=20µA
−IO= 2.0 mA
or VIL;
I=VIH
−IO= 2.6 mA
IO=20µA
IO= 2.0 mA
or VIL;
I=VIH
IO= 2.6 mA
IO=0
Note
1. All typical values are measured at T
amb
=25°C.
1998 Aug 05 5
Page 6
2-input EXCLUSIVE-OR gate
DC CHARACTERISTICS FOR THE 74HCT1G
Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).
T
(°C)
amb
SYMBOL PARAMETER
V
IH
HIGH-level input voltage
V
IL
LOW-level input voltage
V
OH
HIGH-level output voltage; all outputs
V
OH
HIGH-level output voltage; standard outputs
V
OL
LOW-level output voltage; all outputs
V
OL
LOW-level output voltage; standard outputs
I
I
I
CC
input leakage current −− 1.0 − 1.0 µA 5.5 VI=VCCor GND quiescent supply
current
∆I
CC
additional supply current per input
−40 to +85 −40 to +125
MIN. TYP.
(1)
MAX. MIN. MAX.
2.0 1.6 − 2.0 − V 4.5 to 5.5
− 1.2 0.8 − 0.8 V 4.5 to 5.5
4.4 4.5 − 4.4 − V 4.5 VI=VIHor VIL;
4.13 4.32 − 3.7 − V 4.5 VI=VIHor VIL;
− 0 0.1 − 0.1 V 4.5 VI=VIHor VIL;
− 0.15 0.33 − 0.4 V 4.5 VI=VIHor VIL;
−− 10.0 − 20.0 µA 5.5 VI=VCCor GND;
−− 500 − 850 µA 4.5 to 5.5 VI=VCC− 2.1 V;
UNIT
74HC1G86;
74HCT1G86
TEST CONDITIONS
VCC(V) OTHER
−IO=20µA
−IO= 2.0 mA
IO=20µA
IO= 2.0 mA
IO=0
IO=0
Note
1. All typical values are measured at T
amb
=25°C.
1998 Aug 05 6
Page 7
2-input EXCLUSIVE-OR gate
AC CHARACTERISTICS FOR 74HC1G86
GND = 0 V; t
SYMBOL PARAMETER
t
PHL/tPLH
Note
1. All typical values are measured at T
AC CHARACTERISTICS FOR 74HCT1G86
GND = 0 V; t
SYMBOL PARAMETER
t
PHL/tPLH
=6.0 ns; CL=50pF.
r=tf
propagation delay inA, inB to outY
=6.0 ns; CL=50pF.
r=tf
propagation delay inA, inB to outY
−40 to +85 −40 to +125
MIN. TYP.
− 22 115 − 135 ns 2.0 see Figs 5 and 6
− 11 23 − 27 ns 4.5
− 920−23 ns 6.0
amb
MIN. TYP.
− 13 23 − 27 ns 4.5 see Figs 5 and 6
T
(°C)
amb
(1)
MAX. MIN. MAX.
=25°C.
T
(°C)
amb
−40 to +85 −40 to +125
(1)
MAX. MIN. MAX.
74HC1G86;
74HCT1G86
TEST CONDITIONS
UNIT
VCC(V) WAVEFORMS
TEST CONDITIONS
UNIT
VCC(V) WAVEFORMS
Note
1. All typical values are measured at T
amb
=25°C.
1998 Aug 05 7
Page 8
2-input EXCLUSIVE-OR gate

AC WAVEFORMS

handbook, halfpage
(1)
inA, inB INPUT
outY OUTPUT
(1) HC1G: VM=50%; VI= GNDto VCC;
HCT1G: V
= 1.3V; VI= GNDto 3.0V.
M
V
M
t
PHL
(1)
V
M
t
PLH
MNA041
74HC1G86;
74HCT1G86
handbook, halfpage
V
PULSE
GENERATOR
Definitions for test circuit: CL= load capacitance including jig and probe capacitance
(see “AC characteristics for 74HC1G86” and “AC characteristicsfor 74HCT1G86” for values).
= termination resistance should be equal to the output
R
T
impedance Z
of the pulse generator.
O
I
V
CC
V
D.U.T.
R
T
O
C
50 pF
L
MNA034
Fig.5 The input (inA, inB) to output (outY)
propagation delays.
Fig.6 Load circuitry for switching times.
1998 Aug 05 8
Page 9
2-input EXCLUSIVE-OR gate
74HC1G86;
74HCT1G86

PACKAGE OUTLINE

Plastic surface mounted package; 5 leads SOT353
D
y
E
H
E
AB
45
X
v M
A
132
e
DIMENSIONS (mm are the original dimensions)
A
UNIT
mm
A
1.1
0.8
max
0.1
1
b
p
0.30
0.20
b
1
0.25
0.10
p
e
cD
2.2
1.8
A
wBM
0 1 2 mm
scale
E
1.35
1.15
(2)
1.3
e
0.65
H
E
1
2.2
2.0
e
A
L
0.45
0.15
1
detail X
Qywv
p
0.25
0.15
0.2 0.10.2
Q
L
p
c
OUTLINE VERSION

SOT353

IEC JEDEC EIAJ
REFERENCES
1998 Aug 05 9
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28SC-88A
Page 10
2-input EXCLUSIVE-OR gate
SOLDERING Introduction
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used.
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our
“Data Handbook IC26; Integrated Circuit Packages”
(order code 9398 652 90011).
Reflow soldering
Reflow soldering techniques are suitable for all SO packages.
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 °C.
74HC1G86;
74HCT1G86
Wave soldering
Wave soldering techniques can be used for all SO packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used.
• The longitudinal axis of the package footprint must be parallel to the solder flow.
• The package footprint must incorporate solder thieves at the downstream end.
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured.
Maximum permissible solder temperature is 260 °C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 °C within 6 seconds. Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C.
1998 Aug 05 10
Page 11
2-input EXCLUSIVE-OR gate
74HC1G86;
74HCT1G86

DEFINITIONS

Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Aug 05 11
Page 12
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Internet: http://www.semiconductors.philips.com
Printed in The Netherlands 245106/00/01/pp12 Date of release: 1998 Aug 05 Document order number: 9397 750 03668
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