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© 1999 Fairchild Semiconductor Corporation DS009556 www.fairchildsemi.com
April 1988
Revised August 1999
74F545 Octal Bidirectional Transceiver with 3-STATE Outputs
74F545
Octal Bidirectional Transceiver with 3-STATE Outputs
General Description
The 74F545 is an 8-bit, 3-STATE, high-speed transceiver. It
provides bidirectiona l drive for bus-oriented microp rocessor and digital communicat ions systems. Straight throu gh
bidirectional transceivers are featured, with 24 mA bus
drive capability on the A Ports and 64 mA bus drive capability on the B Ports.
One input, Transmit/Receive (T/R
) determines the direction
of logic signals through the bidirectional transceiver. Transmit enables data from A-t o-B Ports; Recei ve enables da ta
from B-to-A Ports. The Output Enable input disables both A
and B Ports by placing them in a 3-STATE condition.
Features
■ Higher drive than 8304
■ 8-bit bidirectional data flow reduces system package
count
■ 3-STATE inputs/outputs for interfaci ng with bus-orien ted
systems
■ 24 mA and 64 mA bus drive capability on A and B Ports,
respectively
■ Transmit/Receive and Output Enable simplify control
logic
■ Guarante ed 4000V minimum ESD protection
Ordering Code:
Devices also availab le in Tape and Reel. Specify by appending th e s uffix let t er “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74F545SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F545PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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74F545
Unit Loading/Fan Out
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Logic Diagram
Please note that this diagram is provided o nly f or t he understanding of lo gic operations and should not be used to estimate propagation delays.
Pin Names Description
U.L.
Input I
IH/IIL
HIGH/LOW
Output I
OH/IOL
OE Output Enable Input (Active LOW) 1.0/2.0 20 µA/−1.2 mA
T/R
Transmit/Receive Input 1.0/2.0 20 µA/−1.2 mA
A
0–A7
Side A 3-STATE Inputs or 3.5/1.083 70 µA/−650 µA
3-STATE Outputs 150/40 (33.3) −3 mA/24 mA (20 mA)
B
0–B7
Side B 3-STATE Inputs or 3.5/1.083 70 µA/−650 µA
3-STATE Outputs 600/106.6 (80) −12 mA/64 mA (48 mA)
Inputs Outputs
OE
T/R
L L Bus B Data to Bus A
L H Bus A Data to Bus B
HXHigh Z
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74F545
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
Note 1: Absolute maximum ratings are values beyon d which the device
may be damaged or have its useful life impaired . Functional operation
under these condit ions is not implied.
Note 2: Either voltage limit or curren t limit is sufficient to protect in puts.
DC Electrical Characteristics
Storage Temperature −65°C to +150°C
Ambient Temperature under Bias −55°C to +125°C
Junction Temperature under Bias −55°C to +150C
V
CC
Pin Potential to Ground Pin −0.5V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V
CC
= 0V)
Standard Output −0.5V to V
CC
3-STATE Output −0.5V to +5.5V
Current Applied to Output
in LOW State (Max) twi ce the rat ed I
OL
(mA)
ESD Last Passing Voltage (Min) 4000V
Free Air Ambi ent Temperature 0°C to +70°C
Supply Voltage +4.5V to +5.5V
Symbol Parameter Min Typ Max Units
V
CC
Conditions
V
IH
Input HIGH Voltage 2.0 V Recognized as a HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA (OE, T/R)
V
OH
Output HIGH 10% V
CC
2.5
VMin
IOH = −1 mA (An)
Voltage 10% V
CC
2.4 IOH = −3 mA (An)
10% V
CC
2.0 IOH = −15 mA (Bn)
5% V
CC
2.7 IOH = −1 mA (An)
5% V
CC
2.7 IOH = −3 mA (An)
V
OL
Output LOW 10% V
CC
0.5
VMin
IOL = 24 mA (An)
Voltage 10% V
CC
0.55 IOL = 64 mA (Bn)
I
IH
Input HIGH
5.0 µAMaxVIN = 2.7V (OE, T/R)
Current
I
BVI
Input HIGH Current
7.0 µAMaxVIN = 7.0V (OE, T/R)
Breakdown Test
I
BVIT
Input HIGH Current
0.5 mA Max VIN = 5.5V (An, Bn)
Breakdown (I/O)
I
CEX
Output HIGH
50 µAMaxV
OUT
= V
CC
Leakage Current
V
ID
Input Leakage
4.75 V 0.0
IID = 1.9 µA
Test All Other Pins Grounded
I
OD
Output Leakage
3.75 µA0.0
V
IOD
= 150 mV
Circuit Current All Other Pins Grounded
I
IL
Input LOW Current −1.2 mA Max
VIN = 0.5V (OE, T/R)
IIH + I
OZH
Output Leakage Current 70 µAMaxV
OUT
= 2.7V (An, Bn)
IIL + I
OZL
Output Leakage Current −650 µAMaxV
OUT
= 0.5V (An, Bn)
I
OS
Output Short-Circuit Current −60 −150
mA Max
V
OUT
= 0V (An)
−100 −225 V
OUT
= 0V (Bn)
I
ZZ
Bus Drainage Test 500 µA0.0VV
OUT
= 5.25V
I
CCH
Power Supply Current 70 90 mA Max VO = HIGH
I
CCL
Power Supply Current 95 120 mA Max VO = LOW
I
CCZ
Power Supply Current 85 110 mA Max VO = HIGH Z
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74F545
AC Electrical Characteristics
Symbol Parameter
TA = +25°CT
A
= −55°C to +125°CTA = 0°C to +70°C
Units
VCC = +5.0V VCC = +5.0V VCC = +5.0V
CL = 50 pF CL = 50 pF CL = 50 pF
Min Typ Max Min Max Min Max
t
PLH
Propagation Delay 2.5 4.2 6.0 2.0 7.5 2.5 7.0
ns
t
PHL
An to Bn or Bn to A
n
2.54.66.02.07.52.57.0
t
PZH
Output Enable Time 3.0 5.3 7.0 2.5 9.0 3.0 8.0
ns
t
PZL
3.5 6.0 8.0 3.0 10.0 3.5 9.0
t
PHZ
Output Disable Time 3.0 5.0 6.5 2.5 9.0 3.0 7.5
t
PLZ
2.0 5.0 6.5 2.0 10.0 2.0 7.5
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74F545
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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74F545 Octal Bidirectional Transceiver with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit pate nt licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
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which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant inju ry to the
user.
2. A critical component i n any compon ent of a lif e support
device or system whose failu re to perform can be reasonably expected to ca use the fa i lure of the life su pp ort
device or system, or to affect its safety or effectiveness.
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