Page 1
INTEGRATED CIRCUITS
74F540
Octal inverter buffer (3- State)
74F541
Octal buffer (3- State)
Product specification
IC15 Data Handbook
1990 Jan 08
Page 2
Philips Semiconductors Product specification
74F540, 74F541Buffers
74F540 Octal Inverter Buffer (3-State)
74F541 Octal Buffer (3-State)
FEA TURES
•High impedance NPN base inputs for reduced loading
(20µA in High and Low states)
•Low power, light bus loading
•Functionally similar to the 74F240 and 74F241
TYPE
TYPICAL
PROPAGATION DELAY
74F540 3.5ns 58mA
74F541 5.5ns 55mA
TYPICAL SUPPL Y
CURRENT
(TOTAL)
•Provides ideal interface and increases fan-out of MOS
microprocessors
•Efficient pinout to facilitate PC board layout
•Octal bus interface
•3-State buffer outputs sink 64mA
•15mA source current
DESCRIPTION
The 74F540 and 74F541 are octal buffers that are ideal for driving
bus lines or buffer memory address registers. The outputs are
capable of sinking 64mA and sourcing up to 15mA, producing very
good capacitive drive characteristics. The devices feature input and
outputs on opposite sides of the package to facilitate printed circuit
board layout.
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
I0–I7 Data inputs 1.0/0.033 20µA/20µA
OE0, OE1 3-State output enable inputs (active Low) 1.0/0.033 20µA/20µA
Y0 - Y7 Data outputs (74F541) 750/106.7 15mA/64mA
Y0 - Y7 Data outputs (74F540) 750/106.7 15mA/64mA
NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
ORDERING INFORMATION
COMMERCIAL RANGE
DESCRIPTION
20-Pin Plastic DIP N74F540, N74F541N SOT146-1
20-Pin Plastic SOL N74F540D, N74F541D SOT163-1
VCC = 5V ±10%,
T
= 0°C to +70°C
amb
74F(U.L.)
HIGH/LOW
PKG DWG #
LOAD VALUE
HIGH/LOW
PIN CONFIGURATION – 74F540
OE
0
1
I0
2
I1
3
I2
4
I3
5
I4
6
I5
7
I6
8
I7
9
10 11
GND
1990 Jan 08 853–0068 98494
20
19
18
17
16
15
14
13
12
SF01060
V
OE1
Y
Y
Y
Y3
Y4
Y
Y6
Y
CC
0
1
2
5
7
PIN CONFIGURATION – 74F541
OE
0
1
I0
2
I1
3
I2
4
I3
5
I4
6
I5
7
I6
8
I7
9
10 11
GND
2
20
19
18
17
16
15
14
13
12
SF01021
V
OE1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
CC
Page 3
Philips Semiconductors Product specification
74F540, 74F541Buffers
LOGIC SYMBOL – 74F540
= Pin 20
V
CC
GND = Pin 10
234
I0 I1 I4 I5 I6 I7
1
OE0
19
OE1
Y0 Y1 Y4 Y5 Y6 Y7
18 17 16 15 14 13 12 11
56789
I3I2
Y2 Y3
LOGIC SYMBOL (IEEE/IEC) – 74F540
1
19
2
3
4
5
6
7
8
9
&
EN
SF01022
18
17
16
15
14
13
12
11
LOGIC SYMBOL – 74F541
= Pin 20
V
CC
GND = Pin 10
234
I0 I1 I4 I5 I6 I7
1
OE0
19
OE1
Y0 Y1 Y4 Y5 Y6 Y7
18 17 16 15 14 13 12 11
56789
I3I2
Y2 Y3
LOGIC SYMBOL (IEEE/IEC) – 74F541
1
19
2
3
4
5
6
7
8
9
&
EN
SF01023
18
17
16
15
14
13
12
11
LOGIC DIAGRAM – 74F540
1
OE0
19
OE
1
2
I0
3
I1
4
I2
5
I3
6
I4
7
I5
8
I6
9
VCC= Pin 20
GND = Pin 10
I7
SF01024
18
17
16
15
14
13
12
11
SF01026
SF01025
LOGIC DIAGRAM – 74F541
1
OE0
19
1
OE
Y0
Y
1
2
Y
Y
3
4
Y
Y
5
6
Y
Y
7
VCC= Pin 20
GND = Pin 10
2
I0
3
I1
4
I2
5
I3
6
I4
7
I5
8
I6
9
I7
18
17
16
15
14
13
12
11
SF01027
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
1990 Jan 08
3
Page 4
Philips Semiconductors Product specification
INPUTS
SYMBOL
PARAMETER
UNIT
74F540, 74F541Buffers
FUNCTION TABLE
OUTPUTS
74F541 74F540
OE0 OE1 In Yn Yn
L
L
X
H
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
L
L
H
X
L
H
X
X
L
H
Z
Z
H
L
Z
Z
PARAMETER RATING UNIT
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5.0 mA
Voltage applied to output in High output state –0.5 to +V
CC
V
Current applied to output in Low output state 128 mA
Operating free-air temperature range 0 to +70 °C
Storage temperature –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
V
V
V
I
I
I
T
CC
IH
IL
IK
OH
OL
amb
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
Low-level input voltage 0.8 V
Input clamp current –18 mA
High-level output current –15 mA
Low-level output current 64 mA
Operating free-air temperature range 0 70 °C
LIMITS
MIN NOM MAX
1990 Jan 08
4
Page 5
Philips Semiconductors Product specification
NO TAG
I
3mA
VOHHigh-level output voltage
V
MAX
I
15mA
VOLLow-level output voltage
V
MAX
I
MAX
I
y
V
MAX
74F540, 74F541Buffers
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
SYMBOL PARAMETER TEST CONDITIONS
MIN
TYP
NO TAG
MAX
UNIT
V
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
CC
IK
±10%V
±5%V
±10%V
±5%V
±10%V
±5%V
CC
CC
CC
= –
VCC = MIN,
p
=
IL
VIH = MIN
OH
,
= –
OH
VCC = MIN,
=
p
IK
Input clamp voltage VCC = MIN, II = I
IL
V
Input current at maximum input
voltage
,
= MIN
IH
VCC = 0.0V, VI = 7.0V 100 µA
OL
=
High-level input current VCC = MAX, VI = 2.7V 20 µA
Low-level input current VCC = MAX, VI = 0.5V –20 µA
Off-state output current
High-level voltage applied
Off-state output current
Low-level voltage applied
Short-circuit output current
74F540
Supply current
(total)
74F541
NO TAG
I
CCH
I
CCL
I
CCZ
I
CCH
I
CCL
I
CCZ
VCC = MAX, VO = 2.7V 50 µA
V
= MAX, VO = 0.5V –50 µA
CC
VCC = MAX –100 –225 mA
In=OEn=GND 22 30 mA
In=4.5V, OEn=GND 58 75 mA
CC
=
In=GND, OEn=4.5V 40 55 mA
In=4.5V, OEn=GND 30 40 mA
In=OEn=GND 55 72 mA
In=GND, OEn=4.5V 45 58 mA
2.4 V
CC
2.7 3.4 V
2.0 V
CC
2.0 V
CC
0.42 0.55 V
–0.73 –1.2 V
0.55 V
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value under the recommended operating conditions for the applicable type.
2. All typical values are at V
3. Not more than one output should be shorted at a time. For testing I
= 5V, T
CC
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
amb
= 25°C.
, the use of high-speed test apparatus and/or sample-and-hold
OS
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
should be performed last.
OS
1990 Jan 08
5
Page 6
Philips Semiconductors Product specification
TEST
CONDITIONS
74F540, 74F541Buffers
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
SYMBOL PARAMETER
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
Propagation delay
In to Yn
Output Enable time
to High or Low level
Output Disable time
from High or Low level
Propagation delay
In to Yn
Output Enable time
to High or Low level
Output Disable time
from High or Low level
74F540
74F541
Waveform 1
Waveform 3
Waveform 4
Waveform 3
Waveform 4
Waveform 2
Waveform 3
Waveform 4
Waveform 3
Waveform 4
= +25°C T
amb
VCC = +5.0V VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
3.0
1.5
2.0
4.0
2.0
2.0
2.5
3.5
3.0
3.0
2.0
2.0
4.5
2.5
3.5
7.5
4.0
4.0
5.0
6.0
5.5
6.5
4.0
4.0
6.5
4.5
6.5
9.5
6.0
5.5
6.5
7.0
7.0
8.5
7.0
7.0
= 0°C to +70°C
amb
2.5
1.5
2.0
4.0
2.0
2.0
2.5
3.0
3.0
3.0
2.0
2.0
7.5
5.0
7.0
10.0
6.5
6.0
7.0
7.5
7.5
9.5
7.5
7.5
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
In
Y
n
V
M
t
PHL
Waveform 1. Propagation Delay Data to Outputs for 74F540
OEn
Yn, Y
n
V
M
t
PZH
V
M
Waveform 3. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
V
M
t
PLH
V
M
V
M
t
PHZ
V
M
SF01028
VOH -0.3V
SF01030
In
Yn
V
M
t
PLH
V
M
t
PHL
V
M
V
M
SF00150
Waveform 2. Propagation Delay Data to Outputs for 74F541
OEn
n
Yn, Y
0V
V
M
t
PZL
V
M
t
PLZ
V
M
V
+0.3V
OL
SF01031
Waveform 4. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
1990 Jan 08
6
Page 7
Philips Semiconductors Product specification
74F540, 74F541Buffers
TEST CIRCUIT AND WAVEFORM
V
V
PULSE
GENERATOR
IN
R
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t
PLZ
t
PZL
closed
closed
All other open
T
D.U.T.
CC
V
OUT
7.0V
R
L
C
R
L
L
NEGATIVE
PULSE
POSITIVE
PULSE
90%
10%
V
M
10%
t
THL (tf
t
TLH (tr
90%
V
M
Input Pulse Definition
t
w
V
M
10%
)
)
t
)
TLH (tr
t
)
THL (tf
90%
V
M
t
w
90%
10%
AMP (V)
0V
AMP (V)
0V
DEFINITIONS:
= Load resistor;
R
L
see AC electrical characteristics for value.
C
= Load capacitance includes jig and probe capacitance;
L
see AC electrical characteristics for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
family
74F
INPUT PULSE REQUIREMENTS
V
amplitude
3.0V
M
1.5V
rep. rate
1MHz 500ns
t
w
t
TLHtTHL
2.5ns 2.5ns
SF00777
1990 Jan 08
7
Page 8
Philips Semiconductors Product specification
Buffers
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
74F540, 74F541
1990 Jan 08
8
Page 9
Philips Semiconductors Product specification
Buffers
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
74F540, 74F541
1990 Jan 08
9
Page 10
Philips Semiconductors Product specification
Buffers
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
74F540, 74F541
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98
Document order number: 9397-750-05134
yyyy mmm dd
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