Page 1
INTEGRATED CIRCUITS
74F534
Octal D flip-flop, inverting (3-State)
Product specification
Supersedes data of 1999 Jan 08
IC15 Data Handbook
2000 Aug 01
Page 2
Philips Semiconductors Product specification
74F534Octal D flip-flop, inverting (3-State)
FEA TURES
•8-bit positive edge-triggered register
•3-State inverting output buffers
•Common 3-State Output register
•Independent register and 3-State buffer operation
DESCRIPTION
active Low Output Enable (OE
independent of the latch operation. When OE
transparent data appears at the outputs. When OE
outputs are in high impedance “off” state, which means they will
neither drive nor load the bus.
TYPE
TYPICAL f
74F534 165MHz 51mA
) controls all eight 3-State buffers
is Low, the latched or
is High, the
TYPICAL SUPPL Y
MAX
CURRENT
(TOTAL)
The 74F534 is an 8-bit edge-triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the Clock (CP) and Output Enable (OE) control
gates.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition is transferred to
the corresponding flip-flop’s Q
output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
ORDERING INFORMATION
COMMERCIAL
DESCRIPTION
20-Pin Plastic DIP N74F534N SOT146-1
20-Pin Plastic SOL N74F534D SOT163-1
RANGE
V
= 5V ±10%,
CC
T
= 0°C to +70°C
amb
PKG DWG #
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F (U.L.)
HIGH/LOW
D0 - D7 Data inputs 1.0/1.0 20µA/0.6mA
OE Output Enable input (active Low) 1.0/1.0 20µA/0.6mA
CP Clock Pulse input (active rising edge) 1.0/1.0 20µA/0.6mA
Q0 - Q7 Data outputs 150/40 3.0mA/24mA
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE
HIGH/LOW
PIN CONFIGURATION
1
OE
2
Q0
3
D0
4
D1
5
Q
1
6
2
Q
7
D2
8
D3
9
Q
3Q4
10 11
GND
20
19
18
17
16
15
14
13
12
SF00982
V
Q
D7
D6
Q
Q
D5
D4
CP
CC
7
6
5
LOGIC SYMBOL
34781314
D0 D1Q1D2
11 CP
1
OE
Q0
VCC=Pin 20
GND=Pin 10
Q2Q3D3Q4D4Q5
D5
15129652
17 18
D7
Q6D6Q7
1916
SF00984
2000 Aug 01 853-0374 24250
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Philips Semiconductors Product specification
OPERATING MODES
74F534Octal D flip-flop, inverting (3-State)
LOGIC SYMBOL (IEEE/IEC)
1
11
3
4
7
8
13
14
17
18
LOGIC DIAGRAM
D0 D1 D2 D3 D4 D5 D6 D7
11
CP
EN1
C1
2D
3 4 7 8 13 14 17 18
CPDQ CPDQ CP Q
1
2
5
6
9
12
15
16
19
SF00986
D
CPDQ CPDQ CPDQ CPDQ CPDQ
1
OE
VCC=Pin 20
GND=Pin 10
0Q1Q2Q3Q4Q5Q6Q7
Q
FUNCTION TABLE
INPUTS
OE CP Dn
L
L
↑
↑
l
h
INTERNAL
REGISTER
L
H
L ↑ X NC NC Hold
H
H
↑
↑
Dn
X
NC
Dn
H = High voltage level
h = High voltage level one setup time prior to the Low-to-High clock transition
L = Low voltage level
l = Low voltage level one setup time prior to the Low-to-High clock transition
NC= No change
X = Don’t care
Z = High impedance “off” state
↑ = Low-to-High clock transition
= Not a Low-to-High clock transition
↑
OUTPUTS
Q0 – Q7
H
L
Z
Z
191615129652
SF00988
Load and read register
Disable outputs
2000 Aug 01
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Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
74F534Octal D flip-flop, inverting (3-State)
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL PARAMETER RATING UNIT
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
RECOMMENDED OPERATING CONDITIONS
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5.0 mA
Voltage applied to output in High output state –0.5 to +V
CC
V
Current applied to output in Low output state 48 mA
Operating free-air temperature range 0 to +70 °C
Storage temperature –65 to +125 °C
LIMITS
MIN TYP MAX
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
Low-level input voltage 0.8 V
Input clamp current –18 mA
High-level output current –3 mA
Low-level output current 24 mA
Operating free-air temperature range 0 70 °C
2000 Aug 01
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Philips Semiconductors Product specification
SYMBOL
PARAMETER
TEST CONDITIONS
1
UNIT
VOHHigh-level output voltage
V
CC
MIN, V
IL
MAX,
VOLLow-level output voltage
V
CC
MIN, V
IL
MAX,
74F534Octal D flip-flop, inverting (3-State)
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
MIN TYP
V
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
I
CC
V
= MIN, V
p
p
IK
Input clamp voltage VCC = MIN, II = I
VIH = MIN, IOH = MAX
V
= MIN, V
VIH = MIN, IOL = MAX
Input current at
maximum input voltage
= MAX,
= MAX,
VCC = MAX, VI = 7.0V 100 µA
±10%V
±5%V
CC
±10%V
±5%V
CC
IK
High-level input current VCC = MAX, VI = 2.7V 20 µA
Low-level input current VCC = MAX, VI = 0.5V –0.6 mA
Off-state output current,
High-level voltage applied
Off-state output current,
Low-level voltage applied
Short-circuit output current
3
VCC = MAX, VO = 2.7V 50 µA
VCC = MAX, VO = 0.5V –50 µA
VCC = MAX –60 –150 mA
Supply current (total) VCC = MAX OE=4.5V , Dn=GND 51 86 mA
2.4 V
CC
2.7 3.3 V
CC
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, T
3. Not more than one output should be shorted at a time. For testing I
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
amb
= 25°C.
, the use of high-speed test apparatus and/or sample-and-hold
OS
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
tests should be performed last.
OS
2
MAX
0.35 0.50 V
0.35 0.50 V
–0.73 –1.2 V
AC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum Clock frequency Waveform 1 150 165 135 MHz
Propagation delay
CP to Qn
Output Enable time
to High or Low level
Output Disable time
from High or Low level
AC SETUP REQUIREMENTS
SYMBOL P ARAMETER
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
Setup time,
Dn to CP
Hold time,
Dn to CP
CP pulse width,
High or Low
CONDITIONS
Waveform 2
Waveform 2
Waveform 1
TEST
CONDITIONS
Waveform 1
Waveform 3
Waveform 4
Waveform 3
Waveform 4
TEST
LIMITS
T
= +25°C
amb
VCC = +5V
C
= 50pF, RL = 500Ω
L
T
= 0°C to +70°C
amb
VCC = +5V ± 10%
C
= 50pF, RL = 500Ω
L
MIN TYP MAX MIN MAX
3.0
3.0
2.0
2.0
2.0
2.0
4.5
4.5
4.5
5.0
3.5
3.5
7.0
7.0
7.5
7.5
6.5
5.5
2.5
2.5
2.0
2.0
2.0
2.0
LIMITS
T
= +25°C
amb
VCC = +5V
CL = 50pF, RL = 500Ω
T
= 0°C to +70°C
amb
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
2.0
2.0
0
0
3.0
3.5
2.5
2.5
0
0
3.5
4.0
7.5
7.5
8.5
8.5
7.5
6.5
UNIT
ns
ns
ns
UNIT
ns
ns
ns
2000 Aug 01
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Philips Semiconductors Product specification
74F534Octal D flip-flop, inverting (3-State)
AC WAVEFORMS
For all waveforms, VM = 1.5V
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
MAX
CP
Q
n
V
M
t
PLH
tW(H)
V
M
tW(L)
V
M
V
t
M
PHL
V
M
SF00989
Waveform 1. Propagation Delay, Clock and Enable Inputs
to Output, Enable, Clock Pulse Widths,
and Maximum Clock Frequency
CP
Dn
V
V
M
M
th(H)ts(H)
V
M
Waveform 2. Data Setup and Hold Times
V
V
M
M
th(L)ts(L)
V
M
SF00191
OE
Qn
V
M
t
PZH
V
V
M
t
PHZ
M
Waveform 3. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
TEST CIRCUIT AND WAVEFORM
V
CC
R
V
PULSE
GENERATOR
IN
R
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t
t
PLZ
PZL
closed
closed
All other open
T
D.U.T.
V
OUT
L
C
R
L
L
VOH -0.3V
0V
SF00994
7.0V
NEGATIVE
PULSE
POSITIVE
PULSE
OE
Qn
V
t
PZL
M
V
V
M
t
PLZ
M
VOL +0.3V
SF00995
Waveform 4. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
t
90%
10%
V
M
10%
t
THL (tf
t
TLH (tr
90%
V
M
w
V
10%
)
)
t
w
t
TLH (tr
t
THL (tf
)
)
90%
90%
M
V
M
10%
Input Pulse Definition
AMP (V)
0V
AMP (V)
0V
DEFINITIONS:
R
= Load resistor;
L
= Load capacitance includes jig and probe capacitance;
C
L
R
= Termination resistance should be equal to Z
T
2000 Aug 01
see AC electrical characteristics for value.
see AC electrical characteristics for value.
pulse generators.
OUT
of
family
74F
6
INPUT PULSE REQUIREMENTS
V
amplitude
3.0V
M
1.5V
rep. rate
1MHz 500ns
t
w
t
TLHtTHL
2.5ns 2.5ns
SF00777
Page 7
Philips Semiconductors Product specification
74F534Octal D flip-flop, inverting (3-State)
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
2000 Aug 01
7
Page 8
Philips Semiconductors Product specification
74F534Octal D flip-flop, inverting (3-State)
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
2000 Aug 01
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Philips Semiconductors Product specification
74F534Octal D flip-flop, inverting (3-State)
NOTES
2000 Aug 01
9
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Philips Semiconductors Product specification
74F534Octal D flip-flop, inverting (3-State)
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 2000
All rights reserved. Printed in U.S.A.
Date of release: 08-00
Document order number: 9397-750-07377
2000 Aug 01
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