Datasheet 74f51 DATASHEETS (Philips)

INTEGRATED CIRCUITS

74F51

Dual 2-wide 2-input, 2-wise 3-input
AND-OR-invert gate

Product specification
IC15 Data Handbook

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1989 Mar 03

Philips Semiconductors Product specification

74F51Dual 2-wide 2-input, 2-wide 3-input AND-OR-invert gate

TYPE

TYPICAL

PROPAGATION

DELA Y

TYPICAL

SUPPLY CURRENT

(TOTAL)

74F51 3.0ns 3.5mA

ORDERING INFORMATION

COMMERCIAL RANGE

V

DESCRIPTION

14-pin plastic DIP N74F51N SOT27-1

14-pin plastic SO N74F51D SOT108-1

= 5V ±10%,

CC

= 0°C to +70°C

T

amb

PKG DWG #

PIN CONFIGURATION

D0a

1

D1a

2

D1b

3

D1c

4

D1d

5

1

Q

6

GND

14

V
D0c

13

D0b

12

D0f

11

D0e

10

D0d

9

Q0

87

SF00085

CC

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW

Dna, Dnb, Dnc, Dnd, Dne, Dnf Data inputs 1.0/1.0 20µA/0.6mA

Q0, Q1 Data outputs 50/33 1.0mA/20mA

NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.

LOGIC SYMBOL

1

D0a

VCC = Pin 14
GND = Pin 7

12 13 9 10 11 2 3 4

D1aD0fD0b D0c D0d D1b D1cD0e

Q0 Q1

86

5

D1d

SF00086

IEC/IEEE SYMBOL

9

10
11

13
12

1
2

3
4
5

&

1

8

&

&

1

6

&

SF00087

LOGIC DIAGRAM

FUNCTION TABLE FOR 3-INPUT GATES

INPUTS OUTPUT

VCC = Pin 14
GND = Pin 7

D0a
D0b

D0c

D0d
D0e

D0f

D1a
D1b

D1c
D1d

1
12
13

9
10
11

2

3

4

5

8

6

SF00088

Q0

Q1

D0a D0b D0c D0d D0e D0f Q0

H H H X X X L
X X X H H H L

All other combinations H

NOTES:

H = High voltage level
L = Low voltage level
X = Don’t care

FUNCTION TABLE FOR 2-INPUT GATES

INPUTS OUTPUT

D1a D1b D1c D1d Q1

H H X X L
X X H H L

All other combinations H

NOTES:

H = High voltage level
L = Low voltage level
X = Don’t care

March 3, 1989 853–0054 95962

2

Philips Semiconductors Product specification

SYMBOL

PARAMETER

UNIT

SYMBOL

PARAMETER

TEST CONDITIONS

1

UNIT

VOHHigh-level output voltage

VOLLow-level output voltage

ICCSupply current (total)

V

MAX

74F51Dual 2-wide 2-input, 2-wide 3-input AND-OR-invert gate

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)

SYMBOL

V
V
I

IN

V
I

OUT

T
T

CC
IN

OUT

amb
stg

Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA
Voltage applied to output in High output state –0.5 to V
Current applied to output in Low output state 40 mA
Operating free-air temperature range 0 to +70 °C
Storage temperature range –65 to +150 °C

RECOMMENDED OPERATING CONDITIONS

V
V
V
I
I
I
T

CC
IH

IL
IK
OH
OL

amb

Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
Low-level input voltage 0.8 V
Input clamp current –18 mA
High-level output current –1 mA
Low-level output current 20 mA
Operating free-air temperature range 0 +70 °C

PARAMETER RATING UNIT

CC

V

LIMITS

MIN NOM MAX

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)

LIMITS

MIN TYP

p

p

V

IK

I

I

I

IH

I

IL

I

OS

Input clamp voltage VCC = MIN, II = I
Input current at maximum input

voltage
High-level input current VCC = MAX, VI = 2.7V 20 µA
Low-level input current VCC = MAX, VI = 0.5V –0.6 mA
Short-circuit output current

pp

VCC = MIN, VIL = MAX ±10%V
VIH = MIN, IOH = MAX ±5%V
VCC = MIN, VIL = MAX ±10%V
VIH = MIN, IOL = MAX ±5%V

IK

VCC = MAX, VI = 7.0V 100 µA

3

VCC = MAX –60 –150 mA

I

CCH

I

CCL

CC

=

CC

CC

CC

CC

VIN = GND 1.8 3.0 mA

VIN = 4.5V 5.5 7.5 mA

2.5 V

2.7 3.4 V

NOTES:

1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.

2. All typical values are at V

3. Not more than one output should be shorted at a time. For testing I

= 5V, T

CC

techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting

amb

= 25°C.

, the use of high-speed test apparatus and/or sample-and-hold

OS

of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I

tests should be performed last.

OS

2

MAX

0.30 0.50 V

0.30 0.50 V

–0.73 –1.2 V

March 3, 1989

3

Philips Semiconductors Product specification

TEST

CONDITION

74F51Dual 2-wide 2-input, 2-wide 3-input AND-OR-invert gate

AC ELECTRICAL CHARACTERISTICS

LIMITS

VCC = +5.0V VCC = +5.0V ± 10%

SYMBOL PARAMETER

t

PLH

t

PHL

Propagation delay
Dna, Dnb, Dnc, Dnd, Dne, Dnf to Qn

AC WAVEFORMS

Waveform 1

T

= +25°C T

amb

= 0°C to +70°C UNIT

amb

CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω

MIN TYP MAX MIN MAX

2.0

1.0

3.5

2.5

5.5

4.0

1.5

1.0

6.5

4.5

ns

Dna, Dnb, Dnc, Dnd, Dne, Dnf

Qn

Waveform 1. Propagation Delay for Inverting Outputs

NOTE:

For all waveforms, V

= 1.5V.

M

TEST CIRCUIT AND WAVEFORM

V

CC

V

PULSE

GENERATOR

IN

R

T

Test Circuit for Totem-Pole Outputs

DEFINITIONS:

R

= Load resistor;

L

see AC ELECTRICAL CHARACTERISTICS for value.

= Load capacitance includes jig and probe capacitance;

C

L

see AC ELECTRICAL CHARACTERISTICS for value.

R

= Termination resistance should be equal to Z

T

pulse generators.

D.U.T.

V

OUT

C

V

M

t

PHL

NEGATIVE
PULSE

R

L

L

POSITIVE
PULSE

V

M

t

PLH

90%

10%

V

M

SF00089

t

w

V

M

10%

)

t

THL (tf

t

)

TLH (tr

90%

V

M

t

t

t

w

TLH (tr

THL (tf

10%

)

)

90%

V

M

V

M

90%

10%

AMP (V)

0V

AMP (V)

0V

V

M

Input Pulse Definition

INPUT PULSE REQUIREMENTS

V

amplitude

3.0V

M

1.5V

rep. rate

1MHz 500ns

t

w

t

TLHtTHL

2.5ns 2.5ns

OUT

of

family

74F

March 3, 1989

SF00006

4

Philips Semiconductors Product specification

74F51Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate

DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1

1989 Mar 03

5

Philips Semiconductors Product specification

74F51Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

1989 Mar 03

6

Philips Semiconductors Product specification

74F51Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate

NOTES

1989 Mar 03

7

Philips Semiconductors Product specification

74F51Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate

Data sheet status

Data sheet
status

Objective
specification

Preliminary
specification

Product
specification

Product
status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.

[1]

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

 Copyright Philips Electronics North America Corporation 1998

All rights reserved. Printed in U.S.A.

print code Date of release: 10-98
Document order number: 9397-750-05065

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