Datasheet 74f3893 DATASHEETS (Philips)

INTEGRATED CIRCUITS

74F3893

Quad futurebus backplane transceiver

Product specification
IC15 Data Handbook

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1991 Jan 18

Philips Semiconductors Product specification

74F3893Quad Futurebus backplane transceiver

FEA TURES

• Quad backplane transceiver

• Drives heavily loaded backplanes with equivalent load

impedances down to 10 ohms

• Futurebus drivers sink 100mA

• Reduced voltage swing (1 volt) produces less noise and

reduces power consumption

• High speed operation enhances performance of backplane

buses and facilitates incident wave switching

• Compatible with IEEE 896 and IEEE 1194.1 Futurebus

Standards

• Built–in precision band–gap (BG) reference provides

accurate receiver thresholds and improved noise immunity

• Glitch–free power up/power down operation on all outputs

• Pin and function compatible with NSC DS3893

DESCRIPTION

The 74F3893 is a quad backplane transceivers and is
intended to be used in very high speed bus systems.

The 74F3893 interfaces to ‘Backplane Transceiver Logic’
(BTL). BTL features a reduced (1V to 2V) voltage swing for
lower power consumption and a series diode on the drivers
to reduce capacitive loading (< 5pF).

Incident wave switching is employed, therefore BTL
propagation delays are short. Although the voltage swing is

much less for BTL, so is its receiver threshold region,
therefore noise margins are excellent.

BTL offers low power consumption, low ground bounce, EMI
and crosstalk, low capacitive loading, superior noise margin
and low propagation delays. This results in a high
bandwidth, reliable backplane.

The 74F3893 has four TTL outputs (Rn) on the receiver

side with a common receiver enable input (RE
data inputs (Dn) which are also TTL. These data inputs are
NANDed with the data enable input (DE). The four I/O pins
(bus side) are futurebus compatible, sink a minimum of
100mA, and are designed to drive heavily loaded
backplanes with load impedances as low as 10 ohms. All
outputs are designed to be glitch–free during power up and
down.

TYPE TYPICAL

74F3893 3.0ns 55mA

PROPAGATION DELAY

ORDERING INFORMATION

ORDER CODE

DESCRIPTION COMMERCIAL RANGE

= 5V ±10%,

V

CC

T

= 0°C to +70°C

amb

20-pin PLCC N74F3893A SOT380-1

). It has four

TYPICAL SUPPL Y

CURRENT( TOTAL)

PKG DWG #

INPUT AND OUTPUT LOADING AND FAN OUT TABLE

PINS DESCRIPTION

D0 – D3 Data inputs 1.0/0.067 20µA/40µA

DE Data enable input 1.0/0.33 20µA/200µA

RE Receiver enable input 1.0/0.067 20µA/40µA
I/O0 – I/O3 Bus inputs 5.0/0.033 100µA/20µA
I/O0 – I/O3 Bus outputs OC/166.7 OC/100mA

R0 – R7 Receiver outputs 150/40 3mA/24mA

Notes to input and output loading and fan out table

One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
OC= Open collector.

74F (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

January 18, 1991 853-1397 01496

2

Philips Semiconductors Product specification

74F3893Quad Futurebus backplane transceiver

PIN CONFIGURATION

3212019

4

D1

5

R1

LOGIC GND

6
7

D2

8

R2

9

LOGIC SYMBOL

DE

11

RE

12

I/O0 I/O1 1/O2 I/O3 R0 R1 R2 R3

= Pin 1,

V

CC

LOGIC GND = Pin 8
BUS GND = Pin 13, 16, 19
BG GND = Pin 20

18 17 15 14 3 5 8 10

IEC/IEEE SYMBOL

V

GND

D0R0

CC

PLCC

DER3D3

2 4 7 9

D0 D1 D2 D3

BG

RE

BUS
GND

13121110

BUS
GND

18

I/O0

17

I/O1
BUS GND

16
15

I/O2

14

I/O3

SF00573

SF00574

FUNCTION TABLE

INPUT/

INPUTS

OUT-

PUT

DE RE Dn I/On Rn MODE

H L L H L Transmit to bus
H L H L H
H H Dn Dn Z Receiver 3–state,

L H X H Z transmit to bus
L L X H L Receive, I/On = inputs
L L X L H

Notes to function table

1. H = High voltage level

2. L = Low voltage level

3. X = Don’t care

4. Z = High impedance ”off” state

OUT-

PUT

OPERATING

LOGIC DIAGRAM

VCC = Pin 1
LOGIC GND = Pin 6
BUS GND = Pin 13, 16, 19
BG GND = Pin 20

D0

D2

D3

DE

2

3

R0

4

D1

5

R1

7

8

R2

9

10

R3

11

18

17

12
15

14

SF00576

I/O0

I/O1

RE
I/O2

I/O3

January 18, 1991

11
12

2

4

7

9

EN1
EN2

1D

2

3

18

5

17

7

15

9

14

SF00575

3

Philips Semiconductors Product specification

74F3893Quad Futurebus backplane transceiver

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)

SYMBOL

V
V
I

IN

V
I

OUT

T
T

CC
IN

OUT

amb
stg

Supply voltage –1.5 to +6.5 V
Input voltage –1.5 to +6.5 V
Input current –30 to +5 mA

Voltage applied to output in high output state –0.5 to 5.5 V
Current applied to output in low output state
Operating free air temperature range 0 to +70

Storage temperature range –65 to +150

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER MIN NOM MAX UNIT

V
V
V
I
V
I
I

T

CC
IH
IL

Ik

TH
OH
OL

amb

Supply voltage 4.5 5.0 5.5 V
High–level input voltage Dn, DE, RE 2.0 V
Low–level input voltage 0.8 V
Input clamp current –18 mA
Bus input threshold I/On only 1.475 1.55 1.625 mA
High–level output current Rn only –3 mA
Low–level output current 100 mA
Operating free air temperature

range

PARAMETER RATING UNIT

200 mA

°C
°C

LIMITS

0 +70

°C

January 18, 1991

4

Philips Semiconductors Product specification

74F3893Quad Futurebus backplane transceiver

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)

SYMBOL

I
V
V

V
V

OH

OH
OHB

OL
OLB

High–level output current I/On VCC = MAX, VIL = MAX, VIH = MIN, VOH = 1.5V 10 100 µA
High-level output voltage Rn VCC = MAX, VIL = 1.3V, RE = 0.8V, I
High-level output bus voltage I/On VCC = MAX, Dn = DE = 0.8V, VT = 2.0V,

Low-level output voltage Rn VCC = MIN, VIN = 1.8V, RE = 0.8V, I
Low-level output I/On Dn = DE = VIH, I
bus voltage Dn = DE = VIH, I

V

OCB

Driver output positive I/On VCC = MAX or 0V, I/On = 1mA 1.9 2.9 V

clamp voltage Dn = DE = 0.8V, RE = 2.0V I/On = 10mA 2.3 3.2 V
V
I

I

I

IH

I

IHB

I

IL

I

ILB

I

OZH

I

OZL

I

OS

I

CC

IK

Input clamp voltage VCC = MIN, II =I

Input current at maximum input voltage VCC = MAX, VI = 7.0V, DE = RE = Dn = V

High–level input current Dn, RE, DE VCC = MAX, DE = RE = Dn =5.5V 20 µA

High–level I/O bus current

(power off)

Low–level input current Dn, RE VCC = MAX, VI = 0.5V, DE = 4.5V –40 µA

Low–level I/O bus current

(power on)

Off–state output current,

high–level voltage applied

Off–state output current,

low–level voltage applied

Short circuit output current

Supply current4 (total) VCC = MAX, (RE = VIH or VIL) 55 80 mA

Notes to DC electrical characteristics

1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.

2. All typical values are at V

3. Not more than one output should be shorted at a time. For testing I
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I

PARAMETER TEST LIMITS UNIT

CONDITIONS

RT = 10Ω, RE = 2.0V

OL
OL

IK

= 100mA 0.75 1.0 1.2 V
= 80mA 0.75 1.0 1.1 V

1

= MAX 2.5 V

OH

MIN TYP2MAX

2.5 V

= 6mA 0.35 0.5 V

OL

–0.73 -1.2 V

CC

100 µA

I/On VCC = 0V, Dn = DE = 0.8V, I/On =1.2V, RE = 0V 100 µA

DE VCC = MAX, VI = 0.5V, Dn = 4.5V –200 µA

VCC = MAX, Dn = DE = 0.8V, I/On =0.75V,
RE = 0V

–20 20 µA

µA

VCC = MAX, VI = 0.5V, RE = 2V –20

µA

VCC = MAX -60 -150 mA

, the use of high-speed test apparatus and/or sample-and-hold

OS

3

= 5V, T

CC

OS

= 25°C.

amb

tests should be performed last.

I/On

Rn VCC = MAX, VI = 2.7V, RE = 2V 20

Rn

January 18, 1991

5

Philips Semiconductors Product specification

74F3893Quad Futurebus backplane transceiver

AC ELECTRICAL CHARACTERISTICS FOR DRIVER AND DRIVER ENABLE

LIMITS

T

= +25°C T

amb

SYMBOL PARAMETER TEST VCC = +5.0V

CONDITION

CD = 50pF, RT = 10Ω CD= 50pF, RT = 10Ω

MIN TYP MAX MIN MAX

t

PLH

t

PHL

t

PLH

t

PHL

t

TLH

t

THL

t

sk(o)

Propagation delay
Dn to I/On

Propagation delay
DE to I/On

Dn to I/O transition time
10% to 90%, 90% to 10%

Waveform 1

Waveform 1

Waveform 1

1.0

1.5

1.0

1.5

1.0

1.0

2.0

3.0

2.0

3.0

Skew between drivers in same package 1.0 ns

AC ELECTRICAL CHARACTERISTICS FOR RECEIVER

T

= +25°C T

amb

SYMBOL PARAMETER TEST VCC = +5.0V

t
t

PLH
PHL

Propagation delay
I/On to Rn

CONDITION

Waveform 2

CL = 50pF, RL = 1kΩ CL = 50pF, RL = 1kΩ

MIN TYP MAX MIN MAX

1.0

3.6

2.0

5.5

5.0

5.5

4.5

5.5

4.0

4.0

LIMITS

4.5

7.5

= 0°C to +70°C

amb

VCC = +5.0V ± 10%

1.0

1.5

1.0

1.5

1.0

1.0

= 0°C to +70°C

amb

5.5

6.0

5.5

6.0

5.0

5.0

VCC = +5.0V ± 10%

1.0

3.6

5.5

8.5

UNIT

ns

ns

ns

UNIT

ns

AC ELECTRICAL CHARACTERISTICS FOR RECEIVER ENABLE

T

= +25°C T

amb

SYMBOL PARAMETER TEST VCC = +5.0V

t
t

t
t

PZH
PZL

PHZ
PLZ

Output enable time to high or low level,
RE to Rn

Output disable time from high or low level,
RE to Rn

CONDITION

Waveform 3, 4

Waveform 3, 4

CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω

MIN TYP MAX MIN MAX

1.5

2.5

1.5

1.5

3.0

4.0

3.0

3.0

A PORT LIMITS

amb

VCC = +5.0V ± 10%

5.5

7.0

5.5

5.5

1.5

2.0

1.0

1.0

= 0°C to +70°C

6.0

7.5

6.5

6.0

UNIT

ns

ns

January 18, 1991

6

Philips Semiconductors Product specification

74F3893Quad Futurebus backplane transceiver

AC WAVEFORMS

V

DE, Dn

2V

I/On

1V

V

M

t

PHL

V

M

t

PLH

90%

t

V

THL

M

10%

V

M

90%

t

TLH

10%

SF00577

RE

Rn

Waveform 3. 3–state output enable time to high level

Waveform 1. Propagation delay for driver

2V

I/On

1V

Rn

V

M

t

PHL

V

M

Waveform 2. Propagation delay for receiver

V

M

t

PLH

V

M

SF00578

RE

Rn

Waveform 4. 3-state output enable time to low level

M

t

PZH

and output disable time from high level

V

M

t

PZL

and output disable time from low level

Notes to AC waveforms

1. For all waveforms, V

2. The shaded areas indicate when the input is permitted to change for predictable output performance.

= 1.5V.

M

TEST CIRCUITS AND WAVEFORMS

SWITCH POSITION

TEST SWITCH

, t

t

PLZ

PZL

closed

V

CC

openAll other

V

PULSE

GENERATOR

IN

R

D.U.T.

T

Test circuit for 3–state outputs on D port

V

CC

V

OUT

NEGATIVE
PULSE

7.0V

R

L

C

R

L

L

POSITIVE
PULSE

7.0V

90%

10%

V

M

10%

t

THL (tf

t

TLH (tr

90%

V

M

t

)

)

t

V

M

90%

10%

VOH -0.3V

0V

SF00579

VOL +0.3V

SF00580

AMP (V)

Low V

AMP (V)

Low V

t

PHZ

V

M

V

M

t

PLZ

V

M

w

V

M

10%

)

t

TLH (tr

t

)

THL (tf

90%

V

M

w

Input pulse definition

INPUT PULSE REQUIREMENTS

Low V

1.5V

0.0V

PULSE

GENERATOR

R

V

IN

D.U.T.

V

OUT

T

family

amplitude

R

T

C

D

D port

3.0V

1.0V

Test circuit for outputs on I/O port

DEFINITIONS:

= Load resistor; see AC electrical characteristics for value.

R

L

C

= Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.

L

R

= Pull up resistor; see AC Electrical Characteristics for value.

U

CD= Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
R

= Termination resistance should be equal to Z

T

January 18, 1991

of pulse generators.

OUT

7

V

rep. rate

M

1MHz 500ns 2.5ns
1MHz 500nsI/O port 2.0V 1.5V

t

w

t

TLHtTHL

4.0ns

2.5ns

4.0ns

SF00581

Philips Semiconductors Product specification

Quad futurebus backplane transceiver

PLCC20: plastic leaded chip carrier; 20 leads SOT380-1

74F3893

1991 Jan 18

8

Philips Semiconductors Product specification

Quad futurebus backplane transceiver

NOTES

74F3893

1991 Jan 18

9

Philips Semiconductors Product specification

Quad futurebus backplane transceiver

Data sheet status

Data sheet
status

Objective
specification

Preliminary
specification

Product
specification

Product
status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.

[1]

74F3893

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

 Copyright Philips Electronics North America Corporation 1998

All rights reserved. Printed in U.S.A.

print code Date of release: 10-98
Document order number: 9397-750-05206

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yyyy mmm dd

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