Page 1
INTEGRATED CIRCUITS
74F382
Arithmetic Logic Unit
Product specification
IC15 Data Handbook
1990 Jul 12
Page 2
Philips Semiconductors Product specification
74F382Arithmetic logic unit
FEA TURES
•Performs six arithmetic and logic functions
•Selectable Low (clear) and High (preset) functions
•Low-input loading minimizes drive requirements
•Carry output for ripple expansion
•Overflow output for Two’s Complement arithmetic
DESCRIPTION
The 74F382 performs three arithmetic and three logic operations on
two 4-bit words, A and B. Two additional Select (S0–S2) input codes
force the Function outputs Low or High. An overflow output is
provided for convenience in Two’s Complement arithmetic.
A carry output is provided for ripple expansion. For high-speed
expansion using a carry look-ahead generator, refer to the 74F381
data sheet.
Signals applied to the Select inputs, S0–S2, determine the mode of
operation, as indicated in the Function Select Table. An extensive
listing of input and output levels is shown in the Function Table. The
circuit performs the arithmetic functions for either active-HIgh or
active-Low operands, with output levels in the same convention. In
the subtract operating modes, it is necessary to force a carry (High
for active-HIgh operands, Low for active-Low operands) into the Cn
input of the least significant package. Ripple expansion is illustrated
in Figure 1. The overflow output OVR is the Exclusive-OR of Cn+3
and Cn+4; a High signal on OVR indicates overflow in Two’s
complement operation (See Table 2 for Two’s complement
arithmetic). Typical delays for Figure 1 are given in Table 1. When
the 74F382 is cascaded to handle word lengths longer than 4 bits,
only the most significant overflow (OVR) output is used.
PIN CONFIGURATION
1
A1
2
B1
3
A0
4
B0
5
S0
6
S1
S2
F0
F1
GND
TYPICAL
TYPE
PROPAGATION
DELAY
74F382 7.0ns 54mA
20
V
CC
19
A2
18
B2
17
A3
16
B3
15
Cn
147
Cn+4
138
OVR
129
F3
1110
F2
TYPICAL SUPPL Y
CURRENT (TOTAL)
ORDERING INFORMATION
COMMERCIAL RANGE
V
DESCRIPTION
20-pin plastic DIP N74F382N SOT146-1
20-pin plastic SO N74F382D SOT163-1
= 5V ±10%,
CC
T
= 0°C to +70°C
amb
PKG DWG #
SF00935
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS DESCRIPTION
A0 – A3 A operand inputs 1.0/4.0 20µA/2.4mA
B0 – B3 B operand inputs 1.0/4.0 20µA/2.4mA
S0 – S2 Function select inputs 1.0/1.0 20µA/0.6mA
Cn Carry input 1.0/5.0 20µA/3.0mA
Cn+4 Carry output 50/33 1.0mA/20mA
OVR Overflow output 50/33 1.0mA/20mA
F0–F3 Outputs 50/33 1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as 20µA in the High state and 0.6mA in the Low state.
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
1990 Jul 12 853–0419 99966
2
Page 3
Philips Semiconductors Product specification
74F382Arithmetic logic unit
LOGIC SYMBOL
15
5
6
7
V
= Pin 20
CC
GND = Pin 10
3 4 1 2 19 18 17 16
A0 B0 A1 B1 A2 B2 A3 B3
Cn
S0
S1
S2
F0 F1 F2 F3
891112
OVR
Cn+4
13
14
SF00936
IEC/IEEE SYMBOL
5
6
7
15
3
4
1
2
19
18
17
16
0
2
(1/2) Bl
3 Cl
P
Q
P
Q
P
Q
P
Q
M
ALU
0
7
[1]
[2]
[4]
BO/CO
BO/CO
[8]
=1
(1/2)BO
3CO
8
9
11
13
14
12
SF00937
1990 Jul 12
3
Page 4
Philips Semiconductors Product specification
74F382Arithmetic logic unit
LOGIC DIAGRAM
15
Cn
3
A0
8
F0
4
B0
1
A1
9
F1
2
B1
19
A2
11
F2
18
B2
17
A3
12
F3
16
B3
13
OVR
VCC = Pin 20
GND = Pin 10
1990 Jul 12
5
S0
6
S1
7
S2
14
Cn+4
SF00938
4
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Philips Semiconductors Product specification
OPERANDS
Clear
Active-Lo
B minus A
Active-High
Active-Lo
A minus B
Active-High
A Plus B
74F382Arithmetic logic unit
FUNCTION TABLE
INPUTS OUTPUTS
S0 S1 S2 Cn An Bn F0 F1 F2 F3 OVR Cn+4
L L L L X X L L L L H H
L LLHXXLLLLHH
H L L L L L H H H H L L
H LLLLHLHHHLH
H LLLHLLLLLLL
H LLLHHHHHHLL
H L L H L L L L L L L H
H LLHLHHHHHLH
H LLHHLHLLLLL
H LLHHHLLLLLH
L H L L L L H H H H L L
L HL LLHLLLLLL
L HL LHLLHHHLH
L HL LHHHHHHLL
L H L H L L L L L L L H
L HLHLHHLLLLL
L HLHHLHHHHLH
L HLHHHLLLLLH
H H L L L L L L L L L L
H HLL LHHHHHLL
H HLLHLHHHHL L
H HLLHHLHHHLH
H H L H L L H L L L L L
H HLHLHLLLLLH
H HLHHLLLLLLH
H HLHHHHHHHLH
L L H X L L L L L L L L
L LHXLHHHHHLL
L LHLHLHHHHLL
L LHXHHLLLLHH
L LHHHLHHHHHH
H L H X L L L L L L L L
H LHXLHHHHHLL
H LHXHLHHHHLL
H LHLHHHHHHL L
H LHHHHHHHHHH
L H H X L L L L L L H H
L HHX LHLLLLLL
L HHX HLLLLLHH
L HH L HHHHHHLL
L HHHHHHHHHHH
H H H X L L H H H H L L
H HHX LHHHHHL L
H HHXHLHHHHL L
H HHL HHHHHHL L
H H H H H H H H H H H H
H = High voltage level
L = Low voltage level
X = Don’t care
OPERATING
MODE
w
w
A B
A + B
AB
Preset
1990 Jul 12
5
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Philips Semiconductors Product specification
74F382Arithmetic logic unit
FUNCTION SELECT TABLE
SELECT
S0 S1 S2
L L L Clear
H L L B minus A
L H L A minus B
H H L A Plus B
L L H A B
H L H A + B
L H H AB
H H H Preset
H = High voltage level
L = Low voltage level
OPERATING
Table 1. 16-Bit Delay Tabulation
PATH SEGMENT
Ai or Bi to Cn+4 6.5ns 6.5ns
Cn to Cn+4 6.3ns 6.3ns
Cn to Cn+4 6.3ns 6.3ns
Cn to F 8.1ns –
Cn to Cn+4, OVR – 8.0ns
Total Delay 27.2ns 27.1ns
TOWARD
F
MODE
OUTPUT
Cn+4, OVR
Table 2. Two’s Complement Arithmetic
MSB LSB Numerical V alues
L L L L 0
L L L H 1
L L H L 2
L L H H 3
L H L L 4
L H L H 5
L H H L 6
L H H H 7
H L L L –8
H L L H –7
H L H L –6
H L H H –5
H H L L –4
H H L H –3
H H H L –2
H H H H –1
H = High voltage level
L = Low voltage level
APPLICATION
C
IN
SELECT
A0–A3 B0–B3
44
AB
Cn
74F382
S
3
3
F
F0–F3
A4–A7 B4–B7
44
AB
Cn
74F382
S
3
F4–F7
A8–A11 B8–B11
44
AB
Cn+4Cn+4Cn+4
Cn
74F382
S
F
3
F
F8–F11
A12–A15 B12–B15
44
AB
Cn+4
Cn
74F382
S
OVR
3
F
F12–F15
C
OUT
OVERFLOW
SF00939
Figure 1. 16-bit Look-ahead Carry ALU Expansion
1990 Jul 12
6
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Philips Semiconductors Product specification
SYMBOL
PARMETER
UNIT
SYMBOL
PARAMETER
VOHHigh-l
VOLLow-level output voltage
3
74F382Arithmetic logic unit
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.)
SYMBOL PARAMETER RATING UNIT
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
RECOMMENDED OPERATING CONDITIONS
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +1 mA
Voltage applied to output in High output state –0.5 to +V
Current applied to output in Low output state
40 mA
CC
V
Operating free-air temperature range 0 to +70 °C
Storage temperature range –65 to +150 °C
LIMITS
SYMBOL
MIN NOM MAX
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
Low-level input voltage 0.8 V
Input clamp current –18 mA
High-level output current –1 mA
Low-level output current
20 mA
Operating free-air temperature range 0 70 °C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
TEST LIMITS UNIT
CONDITIONS
VCC = MIN, VIL = MAX,
evel output voltage
VIH = MIN, IOH = MAX
p
V
IK
I
I
I
IH
Input clamp voltage VCC = MIN, II = I
Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
High-level input current VCC = MAX, VI = 2.7V 20 µA
VCC = MIN, VIL = MAX, ±10%V
VIH = MIN, IOL = MAX
IK
Cn –3.0 mA
I
IL
Low-level input current
A0–A3, B0–B3
VCC = MAX, VI = 0.5V
S0, S1, S2
I
OS
I
CC
Short-circuit output current
VCC = MAX –60 –150 mA
Supply current (total) VCC = MAX 54 81 mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. Not more than one output should be shorted at a time. For testing I
CC
= 5V, T
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
amb
= 25°C.
, the use of high-speed test apparatus and/or sample-and-hold
OS
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
tests should be performed last.
OS
1
±10%V
±5%V
±5%V
MIN TYP2MAX
2.5 V
CC
2.7 3.4 V
CC
CC
CC
0.30 0.50 V
0.30 0.50 V
–0.73 –1.2 V
–2.4 mA
–0.6 mA
1990 Jul 12
7
Page 8
Philips Semiconductors Product specification
74F382Arithmetic logic unit
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
= +25°C T
amb
SYMBOL PARAMETER TEST VCC = +5.0V VCC = +5.0V ± 10% UNIT
CONDITION CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Propagation delay
Cn to Fn
Propagation delay
An or Bn to Fn
Propagation delay
Si to Fi
Propagation delay
Ai to Bi to Cn+4
Propagation delay
Si to OVR or Cn+4
Propagation delay
Cn to Cn+4
Propagation delay
Cn to OVR
Propagation delay
Ai or Bi to OVR
Waveform 1
Waveform 1
Waveform 1
Waveform 1
Waveform 1
Waveform 1
Waveform 1
Waveform 1
3.0
2.5
3.5
3.0
5.5
5.5
3.5
3.5
7.0
5.0
3.0
3.5
4.5
3.0
6.0
3.5
7.0
4.5
8.0
6.0
9.0
7.5
7.0
6.5
10.5
8.0
4.5
5.0
9.0
5.0
9.0
6.5
12.0
6.5
13.5
10.0
15.0
10.5
10.5
9.5
14.5
11.0
6.0
6.5
13.5
6.5
12.5
9.0
= 0°C to +70°C
amb
2.5
2.5
3.5
2.5
5.5
5.5
3.5
3.5
6.5
5.0
2.5
3.5
4.0
3.0
5.5
3.5
13.5
7.5
17.0
11.0
16.0
12.0
11.5
10.5
17.0
12.0
6.5
7.0
15.0
7.0
16.5
10.0
ns
ns
ns
ns
ns
ns
ns
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
V
IN
V
OUT
V
M
t
PLH
Waveform 1. Propagation Delay for Non-Inverting
or Inverting paths
V
t
V
M
M
PHL
V
M
SF00940
1990 Jul 12
8
Page 9
Philips Semiconductors Product specification
74F382Arithmetic logic unit
TEST CIRCUIT AND WAVEFORM
V
CC
PULSE
GENERATOR
V
IN
R
T
D.U.T.
V
OUT
R
C
L
L
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
= Load resistor;
R
L
see AC ELECTRICAL CHARACTERISTICS for value.
C
= Load capacitance includes jig and probe capacitance;
L
see AC ELECTRICAL CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
NEGATIVE
PULSE
POSITIVE
PULSE
family
74F
90%
10%
amplitude
t
w
V
M
10%
)
V
90%
M
t
THL (tf
t
TLH (tr
)
t
TLH (tr
t
THL (tf
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
rep. rate
M
3.0V 1.5V
1MHz 500ns
10%
)
)
90%
t
w
V
M
V
M
90%
10%
t
TLHtTHL
2.5ns 2.5ns
AMP (V)
0V
AMP (V)
0V
SF00006
1990 Jul 12
9
Page 10
Philips Semiconductors Product specification
74F382Arithmetic Logic Unit
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
1990 Jul 12
10
Page 11
Philips Semiconductors Product specification
74F382Arithmetic Logic Unit
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
1990 Jul 12
11
Page 12
Philips Semiconductors Product specification
74F382Arithmetic Logic Unit
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98
Document order number: 9397-750-05124
yyyy mmm dd
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