•Two 8-bit, back-to-back registers store data moving in both
directions between two bidirectional buses
•Separate Clock, Clock Enable and 3-State Enable provided for
each register
•74F2952 non-inverting
DESCRIPTION
The 74F2952 and 74F2953 are 8-bit registered transceivers. Two
8-bit back-to-back registers store data flowing in both directions
between two bi-directional buses. Data applied to the inputs is
entered and stored on the rising edge of the Clock (CPXX) provided
that the Clock Enable (CEXX
the 3-State output buffers, but is only accessible when the Output
Enable (OEXX
same as for ‘B’ inputs to ‘A’ outputs.
) is Low. Data flow from ‘A’ inputs to ‘B’ outputs is the
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
1989 Sep 22853–1097 97708
2
Page 3
Philips SemiconductorsProduct specification
74F2952, 74F2953Transceivers
PIN CONFIGURATIONS
DIP – 74F2952
OEAB
CPAB
CEAB
PLCC – 74F2952
5
B4
6
B3
7
B2
8
NC
9
B1
10
B0
11
OEAB
1
B7
2
B6
3
B5
4
B4
5
B3
6
B2
7
B1
8
B0
9
10
11
1213
GND
B5B6B7NCVccA7A6
1234
12 13 14 15 16 17
NC
GND
CPAB
CEAB
24
23
22
21
20
19
18
17
16
15
14
CEBA
V
CC
A7
A6
A5
A4
A3
A2
A1
A0
OEBA
CPBA
CEBA
SF01371
262728
18
CPBA
25
24
23
22
21
20
19
OEBA
A5
A4
A3
NC
A2
A1
A0
DIP – 74F2953
OEAB
CPAB
CEAB
PLCC – 74F2953
5
4
B
6
B
3
7
B
2
8
NC
9
1
B
10
0
B
11
OEAB
1
7
B
2
B
6
3
B
5
4
4
B
5
B
3
6
B
2
7
1
B
8
B
0
9
10
11
1213
GND
B5B6B7NCVccA7A6
1234
12 13 14 15 16 17
NC
GND
CPAB
CEAB
24
23
22
21
20
19
18
17
16
15
14
CEBA
V
CC
A7
A
6
5
A
A
4
A
3
2
A
A1
A
0
OEBA
CPBA
CEBA
SF01372
262728
18
CPBA
25
24
23
22
21
20
19
OEBA
A5
A4
A
NC
A
A1
A
3
2
0
1989 Sep 22
SF01373
SF01374
3
Page 4
Philips SemiconductorsProduct specification
74F2952, 74F2953Transceivers
LOGIC SYMBOL – 74F2952
16 17 18 19 20 21 22 23
A0 A1 A2 A3 A4 A5 A6 A7
10
11
14
13
VCC = PIN 24
GND = PIN 12
CPAB
CEAB
CPBA
CEBA
B0 B1 B2 B3 B4 B5 B6 B7
87654321
IEC/IEEE SYMBOL – 74F2952
11
13
15
10
14
168
177
186
195
204
213
222
231
EN1
EN2
EN3
9
EN4
C5
C6
2,3,61,4,5
OEBA
OEAB
SF01375
LOGIC SYMBOL – 74F2953
16 17 18 19 20 21 22 23
A0 A1 A2 A3 A4 A5 A6 A7
10
15
9
11
14
13
VCC = PIN 24
GND = PIN 12
CPAB
CEAB
CPBA
CEBA
B0 B1 B2 B3 B4 B5 B6 B7
87654321
OEBA
OEAB
15
9
SF01376
IEC/IEEE SYMBOL – 74F2953
11
13
15
10
14
168
177
186
195
204
213
222
231
EN1
EN2
EN3
9
EN4
C5
C6
2,3,61,4,5
1989 Sep 22
SF01377
SF01378
4
Page 5
Philips SemiconductorsProduct specification
74F2952, 74F2953Transceivers
LOGIC DIAGRAM – 74F2952
11
CEAB
10
CPAB
9
OEAB
CE
Q
D
CP
CE
Q
D
CP
CE
Q
D
CP
CE
Q
D
CP
CE
Q
D
CP
CE
Q
D
CP
CE
Q
D
CP
CE
Q
D
CP
CEBA
16
A0
17
A1
18
A2
19
A3
20
A4
21
A5
22
A6
23
A7
13
LOGIC DIAGRAM – 74F2953
11
CEAB
10
CPAB
9
OEAB
CE
16
A0
CE
Q
CP
CE
Q
CP
CE
Q
CP
CE
Q
CP
CE
Q
CP
CE
Q
CP
CE
Q
CP
CE
Q
CP
8
D
D
D
D
D
D
D
D
B0
17
A1
7
B1
18
A2
6
B2
19
A3
5
B3
20
A4
4
B4
21
A5
3
B5
22
A6
2
B6
23
A7
1
B7
CEBA
13
Q
D
CP
CE
Q
CP
CE
Q
D
CP
CE
Q
CP
CE
Q
D
CP
CE
Q
CP
CE
Q
D
CP
CE
Q
CP
CE
Q
D
CP
CE
Q
CP
CE
Q
D
CP
CE
Q
CP
CE
Q
D
CP
CE
Q
CP
CE
Q
D
CP
CE
Q
CP
8
D
D
D
D
D
D
D
D
B0
7
B1
6
B2
5
B3
4
B4
3
B5
2
B6
1
B7
14
CPBA
15
OEBA
V
= PIN 24
CC
GND = PIN 12
1989 Sep 22
SF01379
5
14
CPBA
15
OEBA
V
= PIN 24
CC
GND = PIN 12
SF01380
Page 6
Philips SemiconductorsProduct specification
Load data
Enable outputs
I
Current applied to output in Low output state
SYMBOL
PARAMETER
UNIT
IOHHigh-level output current
IOLLow-level output current
74F2952, 74F2953Transceivers
FUNCTION TABLE for Register An or Bn
INPUTS
An or BnCPXXCEXX
XXHNCHold data
L↑LL
H↑LH
H = High voltage level
L = Low voltage level
↑ = Low-to-High transition
X = Don’t Care
XX= AB or BA
INTERNALOPERATING
QMODE
FUNCTION TABLE for Output Enable
INPUTS
OEXX
HXZZDisable outputs
LLLH
LHHL
H = High voltage level
L = Low voltage level
X = Don’t Care
XX= AB or BA
Z = High impedance “off” state
NC= No Change
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
OUT
T
amb
T
stg
Supply voltage–0.5 to +7.0V
Input voltage –0.5 to +7.0V
Input current–30 to +5mA
Voltage applied to output in High output state–0.5 to +5.5V
pp
p
Operating free-air temperature range0 to +70°C
Storage temperature range–65 to +150°C
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
MINTYP2MAX
= –
VCC = MIN,
p
V
=
IL
= MIN
IH
VCC = MIN,
p
V
=
IL
= MIN
IH
OH
,
= –
OH
=
OL
,
IOL = 48mA±10% V
±10% V
±5% V
±10% V
±5% V
±10% V
±5% V
IOL = 64mA±5% V
V
IK
Input clamp voltageVCC = MIN, II = I
IK
CPAB, CPBA,
I
I
Input current at maximum
p
OEAB, OEBA,
CEAB
, CEBA
A0–A7,
B0–B7
VCC = 5.5V, VI = 7.0V100µA
VCC = 5.5V, VI = 5.5V1mA
CPAB, CPBA,
I
IH
High-level input current
OEAB, OEBA,
CEAB
, CEBA
VCC = MAX, VI = 2.7V20µA
CPAB, CPBA,
I
IL
IIH+I
IIL+I
I
CC
Low-level input current
Off-state output current
OZH
High-level voltage applied
Off-state output current
OZL
Low-level voltage applied
Supply current (total)
p
OEAB, OEBA,
CEAB
, CEBA
A0–A7,
B0–B7
A0–A7,
B0–B7
A0–A7
B0–B7
I
CCH
i
CCL
I
CCZ
VCC = MAX, VI = 0.5V–0.6mA
VCC = MAX, VO = 2.7V70µA
VCC = MAX, VO = 0.5V–600µA
CC
=
=
O
VCC = MAX
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. Not more than one output should be shorted at a time. For testing I
CC
= 5V, T
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
amb
= 25°C.
, the use of high-speed test apparatus and/or sample-and-hold
OS
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
tests should be performed last.
OS
2.4V
CC
2.73.3V
CC
2.0V
CC
2.0V
CC
CC
CC
CC
CC
0.350.50V
0.350.50V
0.380.55V
0.420.55V
–0.73–1.2V
–60–150mA
–100–225mA
90140mA
120175mA
105155mA
1989 Sep 22
7
Page 8
Philips SemiconductorsProduct specification
74F2952, 74F2953Transceivers
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
SYMBOLPARAMETER
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum clock frequencyWaveform 1145160135MHz
Propagation delay
CPBA or CPAB to An or Bn
Output Enable time
OEBA or OEAB to An or Bn
Output Disable time
OEBA or OEAB to An or Bn
AC SETUP REQUIREMENTS
SYMBOLPARAMETER
ts(H)
ts(L)
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
Setup time, High or Low
An or Bn to CPAB or CPBA
Setup time, High or Low
An or Bn to CPAB or CPBA
Hold time, High or Low
An or Bn to CPAB or CPBA
Setup time, High or Low
CEAB, CEBA to CPAB, CPBA
Hold time, High or Low
CEAB, CEBA to CPAB, CPBA
CPAB or CPBA pulse width,
High or Low
TEST
CONDITION
Waveform 1
Waveform 3
Waveform 4
Waveform 3
Waveform 4
TEST
CONDITION
74F2952Waveform 2
74F2953Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 1
= +25°C
amb
VCC = +5V
C
= 50pF, RL = 500Ω
L
MINTYPMAXMINMAX
3.0
3.5
2.0
3.5
2.0
1.5
C
5.0
6.0
4.5
6.0
4.0
3.5
T
= +25°C
amb
VCC = +5V
= 50pF, RL = 500Ω
L
7.5
8.5
7.0
9.5
8.0
6.5
MINTYPMAXMINMAX
4.5
3.5
4.0
3.5
0.0
0.0
0.0
4.0
2.5
2.5
3.0
3.5
LIMITS
T
= 0°C to +70°C
amb
VCC = +5V ± 10%
C
= 50pF, RL = 500Ω
L
2.5
3.5
2.0
3.0
1.5
1.0
T
= 0°C to +70°C
amb
VCC = +5V ± 10%
C
= 50pF, RL = 500Ω
L
5.0
4.0
4.0
4.0
0.0
0.0
0.0
4.0
2.5
3.0
3.0
3.5
8.0
9.0
8.0
10.0
9.0
7.0
UNIT
ns
ns
ns
UNIT
ns
ns
ns
ns
ns
ns
1989 Sep 22
8
Page 9
Philips SemiconductorsProduct specification
74F2952, 74F2953Transceivers
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output.
1/f
CPBA
CPAB
An or Bn
MAX
V
or
M
t
PHL
tW(H)
V
M
tW(L)
V
M
V
t
M
PLH
V
M
An, Bn
CEAB
CEBA
CPAB,
CPBA
V
,
V
M
M
ts(H)ts(L)th(H)th(H)
V
M
VMV
M
V
M
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
OEAB
OEBA
An, Bn
V
t
PZH
M
V
,
V
M
t
PHZ
M
Waveform 3. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
TEST CIRCUIT AND WAVEFORMS
V
CC
R
V
PULSE
GENERATOR
IN
R
Test Circuit for 3-State Outputs
SWITCH POSITION
TESTSWITCH
t
t
PLZ
PZL
closed
closed
All otheropen
T
D.U.T.
V
OUT
L
R
C
L
L
SF01161
VOH -0.3V
SF01382
7.0V
0V
NEGATIVE
PULSE
POSITIVE
PULSE
Waveform 2. Data Setup and Hold Times
OEAB
OEBA
An, Bn
V
t
PZL
M
V
,
V
M
t
PLZ
M
VOL +0.3V
SF01383
Waveform 4. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
90%
10%
t
w
V
M
10%
)
V
90%
M
t
THL (tf
t
TLH (tr
)
t
TLH (tr
t
t
w
THL (tf
10%
)
)
90%
V
M
V
M
90%
10%
AMP (V)
0V
AMP (V)
0V
Input Pulse Definition
SF01381
DEFINITIONS:
R
= Load resistor;
L
see AC electrical characteristics for value.
= Load capacitance includes jig and probe capacitance;
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1996
All rights reserved. Printed in U.S.A.
print codeDate of release: 05-96
Document order number:9397-750-05202
1989 Sep 22
14
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