Datasheet 74f164 DATASHEETS (Philips)

INTEGRATED CIRCUITS

74F164

8-bit serial-in parallel-out shift register

Product specification 1995 Sep 22 IC15 Data Handbook

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Philips Semiconductors Product specification

DRAWING

74F1648-bit serial-in parallel-out shift register

FEA TURES

PIN CONFIGURATION

•Gated serial data inputs

1

•Typical shift frequency of 100MHz

•Asynchronous Master Reset

•Buffered clock and data inputs

•Fully synchronous data transfer

•Industrial temperature range available (–40°C to +85°C)

DESCRIPTION

Dsa Dsb

GND

Q0 Q1 Q2 Q3

2 3 4 5 6

The 74F164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered through one of two inputs (Dsa, Dsb); either input can be used as an active High enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied High.

Data shifts one place to the right on each Low-to-High transition of the clock (CP) input, and enters into Q0 the logical AND of the two data inputs (Dsa, Dsb) that existed one setup time before the rising edge. A Low level on the Master Reset (MR

) input overrides all

TYPE TYPICAL f

74F164 100MHz 33mA

max

other inputs and clears the register asynchronously, forcing all outputs Low.

ORDERING INFORMATION

ORDER CODE

DESCRIPTION

14-pin plastic DIP 74F164N I74F164N SOT27-1 14-pin plastic SO 74F164D I74F164D SOT108-1

COMMERCIAL RANGE

VCC = 5V ±10%, T

= 0°C to +70°C

amb

VCC = 5V ±10%, T

INDUSTRIAL RANGE

= –40°C to +85°C

amb

14

V

CC

13

Q7

12

Q6

11

Q5

10

Q4

9

MR CP

87

SF00717

TYPICAL SUPPL Y

CURRENT (TOTAL)

NUMBER

INPUT AND OUTPUT LOADING AND FAN OUT TABLE

PINS DESCRIPTION

Dsa, Dsb Data inputs 1.0/1.0 20µA/0.6mA

CP Clock pulse input (active rising edge) 1.0/1.0 20µA/0.6mA

MR Master reset input (active-Low) 1.0/1.0 20µA/0.6mA

Q0 – Q7 Data outputs 50/33 1.0mA/20mA

One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.

LOGIC SYMBOL

8

9

V

= Pin 14

CC

GND = Pin 7

12

CP

MR

Dsa Dsb

Q0

Q1 Q3 Q4

3 4 5 6 10 11 12 13

Q0 Q1 Q3 Q4

SF00713

IEC/IEEE SYMBOL

74F (U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

R

SRG8

C1/→

&

1D

3 4 5 6

10

11 12 13

SF00714

8

9

1 2

1995 Sep 22 853-0348 15794

2

Philips Semiconductors Product specification

T

O erating free-air tem erature range

°C

SYMBOL

PARAMETER

UNIT

T

O erating free-air tem erature range

°C

74F1648-bit serial-in parallel-out shift register

LOGIC DIAGRAM

1

Dsa

2

Dsb

8

CP

9

V

= Pin 14

CC

GND = Pin 7

MR

FUNCTION TABLE

INPUTS OUTPUTS OPERATING MODE

MR CP Dsa Dsb Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

L X X X L L L L L L L L Reset (Clear) H ↑ l l L q0 q1 q2 q3 q4 q5 q6 H ↑ l h L q0 q1 q2 q3 q4 q5 q6 Shift H ↑ h l L q0 q1 q2 q3 q4 q5 q6 H ↑ h h H q0 q1 q2 q3 q4 q5 q6

H = High voltage level h = High voltage level one setup time prior to the Low-to-High clock transition. L = Low voltage level l = Low voltage level one setup time prior to the Low-to-High clock transition. qn = Lower case letter indicate the state of the referenced output one setup time prior to the Low-to-High clock transition. X = Don’t care ↑ = Low-to-High clock transition

DQ

RD

Q0

3

DQ

RD

Q1

DQ

4

RD

Q2

DQ

5

RD

Q3

6

DQ

RD

Q4

10

DQ

RD

Q5

11

DQ

RD

Q6

12

DQ

CPCPCPCPCPCPCPCP

RD

Q7

13

SF00715

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.)

SYMBOL PARAMETER RATING UNIT

V V I

IN

V I

OUT

T

CC IN

OUT

amb

stg

Supply voltage –0.5 to +7.0 V Input voltage –0.5 to +7.0 V Input current –30 to +5 mA Voltage applied to output in High output state –0.5 to V

CC

Current applied to output in Low output state 40 mA

p

Commercial Range 0 to +70

Industrial Range –40 to +85

Storage temperature range –65 to +150 °C

RECOMMENDED OPERATING CONDITIONS

LIMIT

MIN NOM MAX

V

V V

I

OH

I

OL

amb

Supply voltage 4.5 5.0 5.5 V

CC

High-level iput voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

Input clamp current –18 mA

Ik

High-level output current –1 mA Low-level output current 20 mA

p

Commercial Range 0 +70

Industrial Range –40 +85

V

°

1995 Sep 22

3

Philips Semiconductors Product specification

SYMBOL

PARAMETER

V

High-level out ut voltage

CC IL

74F1648-bit serial-in parallel-out shift register

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)

TEST LIMITS UNIT

CONDITIONS

OH

V

Low-level output voltage

OL

p

VCC = MIN, VIL = MAX, VIH = MIN, IOH = MAX

VCC = MIN, VIL = MAX, VIH = MIN, IOL= MAX

V

I

ILL

I

OS

I

CC

Input clamp voltage VCC = MIN, II = I

IK

I

Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA

I

High-level input current VCC = MAX, VI = 2.7V 20 µA

IH

IK

Low-level input current VCC = MAX, VI = 0.5V –0.6 mA Short-circuit output current

3

VCC = MAX -60 –150 mA

Supply current (total)4 VCC = MAX 33 55 mA

Notes to DC electrical characteristics

1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.

2. All typical values are at V

3. Not more than one output should be shorted at a time. For testing I techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting

CC

= 5V, T

amb

= 25°C.

, the use of high-speed test apparatus and/or sample-and-hold

OS

of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter test, I

4. Measure I open.

with the serial inputs grounded, the clock input at 2.4V , and a momentary ground, then applied to Master Reset, and all outputs

CC

tests should be performed last.

OS

1

±10%V

±5%V

CC

MIN TYP2MAX

2.5 V

2.7 3.4 V

0.30 0.50 V

–0.73 –1.2 V

APPLICATION

RESET

CLOCK

DATA

ENABLE

The 74F164 can be cascaded to form synchronous shift registers of longer length. Here, two devices are combined to form a 16-bit shift register.

Dsa Dsb

CP MR

74F164 74F164

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

D0 D1 D2 D3 D4 D5 D6 D7

Dsa Dsb

H

CP MR

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

D8 D9 D10 D11 D12 D13 D14 D15

SF00716

1995 Sep 22

4

Philips Semiconductors Product specification

T

amb

+25 C

T

amb

0 C to +70 C

T

amb

40 C to +85 C

R

T

amb

+25 C

T

amb

0 C to +70 C

T

amb

40 C to +85 C

R

74F1648-bit serial-in parallel-out shift register

AC ELECTRICAL CHARACTERISTICS

LIMITS

T

SYMBOL PARAMETER

f t

t t

max PLH

PHL

Maximum clock frequency Waveform 1 80 100 80 80 MHz

Propagation delay CP to Qn

Propagation delay

to Qn

MR

AC SETUP REQUIREMENTS

SYMBOL PARAMETER

ts(H) t

S

th(H) t

h

tw(H)

t

w

tw(L)

t

REC

Setup time, High or Low

(L)

D

to CP

n

Hold time, High or Low

(L)

D

to CP

n

CP Pulse width

(L)

High or Low MR Pulse wicth

Low Recovery time

to CP

MR

= +25°C T

TEST

CONDITION

VCC = 5V

= 50pF

C

L

= 500Ω

L

MIN TYP MAX MIN MAX MIN MAX

3.0

5.0

Waveform 1

5.0

7.0

8.0

10.0

Waveform 3 5.5 7.5 10.5 5.5 11.5 5.5 11.5 ns

T

= +25°C T

TEST

CONDITION

VCC = 5V

= 50pF

C

L

= 500Ω

L

MIN TYP MAX MIN MAX MIN MAX

Waveform 2

Waveform 1

7.0

1.0

4.0

7.0

Waveform 3 7.0 7.0 7.0 ns

= 0°C to +70°C T

VCC = +5V±10%

= 50pF

C

L

= 500Ω

L

2.5

5.0

9.0

11.0

LIMITS

= 0°C to +70°C T

VCC = +5V±10%

= 50pF

C

L

= 500Ω

L

7.0

2.0

4.0

7.0

= –40°C to +85°C

VCC = +5V±10%

= 50pF

C

L

= 500Ω

L

2.5

5.0

= –40°C to +85°C

9.0

11.0

VCC = +5V±10%

= 50pF

C

L

= 500Ω

L

7.0

ns

2.0

4.0

7.0

UNIT

ns

UNIT

ns

AC WAVEFORMS

For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.

1/f

max

CP

Qn

V

M

tw(H)

PHL

V

M

tw(L)t

V

M

V

M

t

PLH

V

M

SF00294

Waveform 1. Propagation delay for Clock input to output,

Clock Pulse width, and maximum Clock frequency

CP

Dn

V

M

th(H)ts(H)

V

M

V

M

th(L)ts(L)

V

M

Waveform 2. Data setup and hold times

SF00191

MR

CP

Qn

V

M

t

PHL

Waveform 3. Master Reset pulse width, Master Reset to output

delay and Master Reset to Clock recovery time

tw(L)

V

M

t

REC

V

M

SF00158

1995 Sep 22

5

Philips Semiconductors Product specification

74F1648-bit serial-in parallel-out shift register

TEST CIRCUIT AND WAVEFORMS

V

CC

PULSE

GENERATOR

V

IN

R

T

D.U.T.

V

OUT

R

C

L

Test Circuit for Totem-Pole Outputs

DEFINITIONS:

= Load resistor;

R

L

see AC ELECTRICAL CHARACTERISTICS for value.

C

= Load capacitance includes jig and probe capacitance;

L

see AC ELECTRICAL CHARACTERISTICS for value.

R

= T ermination resistance should be equal to Z

T

pulse generators.

OUT

of

NEGATIVE PULSE

POSITIVE PULSE

family

74F

90%

10%

amplitude

t

w

V

M

10%

)

V

90%

M

t

THL (tf

t

TLH (tr

)

t

TLH (tr

t

THL (tf

t

w

Input Pulse Definition

INPUT PULSE REQUIREMENTS

V

rep. rate

M

3.0V 1.5V

1MHz 500ns

10%

)

90%

t

w

V

M

V

M

90%

10%

t

TLHtTHL

2.5ns 2.5ns

AMP (V)

0V

AMP (V)

0V

SF00006

1995 Sep 22

6

Philips Semiconductors Product specification

74F1648-bit serial-in parallel-out shift register

DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1

1995 Sep 22

7

Philips Semiconductors Product specification

74F1648-bit serial-in parallel-out shift register

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

1995 Sep 22

8

Philips Semiconductors Product specification

74F1648-bit serial-in parallel-out shift register

NOTES

1995 Sep 22

9

Philips Semiconductors Product specification

74F1648-bit serial-in parallel-out shift register

Data sheet status

Objective specification

Preliminary specification

Product specification

Product status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

[1]

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.

Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381

 Copyright Philips Electronics North America Corporation 1998

print code Date of release: 10-98 Document order number: 9397-750-05085

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