The 74F132 contains four 2-input NAND gates which accept
standard TTL input signals and provide standard TTL output levels.
They are capable of transforming slowly changing input signals into
sharply defined, jitter-free output signals. In addition, they have
greater noise margin than conventional NAND gates. Each circuit
contains a 2-input Schmitt trigger followed by a Darlington level
shifter and a phase splitter driving a TTL totem-pole output. The
Scmitt trigger uses positive feedback to effectively speed-up slow
input transitions and provide different input threshold voltages for
positive and negative-going transitions. This hysteresis between the
positive-going and negative-going input threshold (typically 800mV)
is determined by resistor ratios and is essentially insensitive to
temperature and supply voltage variations. As long as three inputs
remain at a more positive voltage than V
respond in the transition of the other input as shown in Waveform 1.
T+MAX
, the gate will
PIN CONFIGURATION
1
D0a
2
D0b
3
0
Q
4
D1a
5
D1b
6
Q
1
7
GND
TYPETYPICAL
PROPAGATION
DELAY
74F1326.3ns13mA
14
V
CC
D3b
13
D3a
12
Q3
11
D2b
10
D2a
9
Q2
8
SF00710
TYPICAL
SUPPLY CURRENT
(TOTAL)
ORDERING INFORMATION
COMMERCIAL RANGE
DESCRIPTION
14-pin plastic DIPN74F132NSOT27-1
14-pin plastic SON74F132DSOT108-1
VCC = 5V ±10%,
T
= 0°C to +70°C
amb
PKG DWG #
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINSDESCRIPTION74F (U.L.) HIGH/LOWLOAD VALUE HIGH/LOW
Dna, DnbData inputs1.0/1.020µA/0.6mA
QnData output50/331.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
12459101213
D0a D0b D1aD2a D2b D3a D3bD1b
VCC = Pin 14
GND = Pin 7
Q0 Q1Q2 Q3
36811
SF00711
IEC/IEEE SYMBOL
1
2
4
5
9
10
12
13
&
3
6
8
11
SF00712
1991 Jun 26853–0342 03094
2
Page 3
Philips SemiconductorsProduct specification
SYMBOL
PARAMETER
UNIT
74F132Quad 2-input NAND Schmitt trigger
LOGIC DIAGRAM
VCC = Pin 14
GND = Pin 7
D0a
D0b
D1a
D1b
D2a
D2b
D3a
D3b
1
2
4
5
9
10
12
13
3
6
8
11
SF00002
Q
0
Q1
Q
2
3
Q
FUNCTION TABLE
DnaDnbQn
LL H
LHH
HLH
HHL
NOTES:
H = High voltage level
L = Low voltage level
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage–0.5 to +7.0V
Input voltage –0.5 to +7.0V
Input current–30 to +5mA
Voltage applied to output in High output state–0.5 to V
Current applied to output in Low output state40mA
Operating free-air temperature range0 to +70°C
Storage temperature–65 to +150°C
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
MINTYP
V
V
V
V
I
T+
I
T–
I
I
I
IH
I
IL
I
OS
T+
T–
T
IK
Positive-going thresholdVCC = 5.0V1.51.72.0V
Negative-going threshold–VCC = 5.0V0.70.91.1V
Hysteresis (V
Input clamp voltageVCC = MIN, II = I
Input current at positive-going thresholdVCC = 5.0V, VI=V
Input current at negative-going thresholdVCC = 5.0V, VI=V
–VT–)VCC = 5.0V0.40.8V
T+
p
p
VCC = MIN,±10%V
VI=V
, IOH = MAX±5%V
T–MAX
VCC = MIN,±10%V
VI=V
, IOL = MAX±5%V
T+MAX
IK
T+
T–
CC
CC
CC
CC
2.5
2.73.4
Input current at maximum input voltageVCC = MAX, VI = 7.0V100µA
High-level input currentVCC = MAX, VI = 2.7V20µA
Low-level input currentVCC = MAX, VI = 0.5V–0.6mA
Short-circuit output current
pp
3
VCC = MAX–60–150mA
I
CCH
I
CCL
CC
=
V
= GND8.512.0
I N
VIN = 4.5V13.019.5
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. Not more than one output should be shorted at a time. For testing I
= 5V, T
CC
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
amb
= 25°C.
, the use of high-speed test apparatus and/or sample-and-hold
OS
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
tests should be performed last.
OS
2
MAX
0.300.50
0.300.50
–0.73–1.2V
0µA
–350µA
1991 Jun 26
4
Page 5
Philips SemiconductorsProduct specification
TEST
CONDITION
74F132Quad 2-input NAND Schmitt trigger
AC ELECTRICAL CHARACTERISTICS
LIMITS
VCC = +5.0VVCC = +5.0V ± 10%
SYMBOLPARAMETER
t
t
PLH
PHL
Propagation delay
Dna, Dnb to Qn
AC WAVEFORMS
For all waveforms, VM = 1.5V.
Waveform 1
T
= +25°CT
amb
= 0°C to +70°CUNIT
amb
CL = 50pF, RL = 500ΩCL = 50pF, RL = 500Ω
MINTYPMAXMINMAX
3.5
4.5
5.5
6.0
7.0
8.5
3.0
4.5
8.5
9.0
ns
Dna, Dnb
Qn
V
M
t
PHL
V
M
t
V
M
Waveform 1. For Inverting Outputs
TEST CIRCUIT AND WAVEFORMS
V
CC
V
PULSE
GENERATOR
IN
R
T
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
= Load resistor;
L
see AC ELECTRICAL CHARACTERISTICS for value.
C
= Load capacitance includes jig and probe capacitance;
SO14: plastic small outline package; 14 leads; body width 3.9 mmSOT108-1
1991 Jun 26
7
Page 8
Philips SemiconductorsProduct specification
74F132Quad 2-input NAND Schmitt trigger
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print codeDate of release: 10-98
Document order number:9397-750-05074
yyyy mmm dd
8
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