The 74ALVCH16240 is a low voltage CMOS 16
BIT BUS BUFFER (INVERTED) fabricated with
sub-micron silicon gate and five-layer metal wiring
2
C
MOS technology. It is ideal for low power and
very high speed 1.65 to 3.6V applications; it can
be interfaced to 3.6V s ignal environment for both
inputs and outputs.
Any nG
BUFFERS. Output Enable input (nG
output con trolgoverns four BUS
) tied together
gives full 16-bit operation.
When nG
nG
is LO W, the outputs are enabled. When
is HIGH, the output are in high impedance
state.
Active bus-hold circuitry isprovided to hold
unused or floating data inputs at a valid logic level.
This device is designed to be used with 3 state
memory address drivers, etc.
All inputsandoutputs areequippedwith
protection circuits aga inst static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
253G
30, 29, 27, 26 4A1 to 4A4 Data Outputs
36, 35, 33, 32 3A1 to 3A4 Data Outputs
41, 40, 38, 37 2A1 to 2A4 Data Outputs
47, 46, 44, 43 1A1 to 1A4 Data Outputs
482G
4, 10, 15, 21,
28, 34, 39, 45
7, 18, 31, 42
to 1Y4 Data Outputs
to 2Y4 Data Outputs
to 3Y4 Data Outputs
to 4Y4 Data Outputs
GNDGround (0V)
V
CC
Output Enable Input
Output Enable Input
Output Enable Input
Output Enable Input
Positive Supply Voltage
TRUTH TABLE
INPUTSOUTPUT
G
LLH
LHL
HXZ
X : Don‘t Care
Z : High Impedance
AnYn
IEC LOGIC SYMBOLS
2/10
Page 3
74ALVCH16240
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
V
I
I
OK
I
or I
I
CC
P
T
T
Absolute Maximum Ratings are those values beyond which damage tothe device may occur. Functional operation under these conditions is
not implied
1) I
absolute maximum rating must be observed
O
2) V
<GND,VO>V
O
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
V
I
OH,IOL
I
OH,IOL
I
OH,IOL
T
dt/dvInput Rise and Fall Time (note 1)0 to 10ns/V
1) VINfrom0.8V to 2Vat VCC=3.0V
Supply Voltage
CC
DC Input Voltage
I
DC Output Voltage (OFF State)
O
DC Output Voltage (High or Low State) (note 1)-0.5 to VCC+ 0.5
O
DC Input Diode Current
IK
DC Output Diode Current (note 2)
DC Output Current
O
DC VCCor Ground Current per Supply Pin
GND
Power Dissipation
D
Storage Temperature
stg
Lead Temperature (10 sec)
L
CC
Supply Voltage
CC
Input Voltage
I
Output Voltage (OFF State)
O
Output Voltage (High or Low State)0 to V
O
High or Low Level Output Current (VCC= 3.0 to 3.6V)
High or Low Level Output Current (VCC= 2.3 to 2.7V)
High or Low Level Output Current (VCC= 1.8V)
Operating Temperature
op
-0.5 to +4.6V
-0.5 to +4.6V
-0.5 to +4.6V
V
-50mA
-50mA
± 50mA
± 100mA
400mW
-65 to +150°C
300°C
1.65 to 3.6V
-0.3 to 3.6V
0 to 3.6V
CC
V
± 24mA
± 12mA
± 6mA
-55 to 125°C
3/10
Page 4
74ALVCH16240
DC SPECIFICATIONS
Test ConditionValue
SymbolParameter
V
V
V
I
IHOLD
High Level Input
IH
Voltage
V
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
Input Leakage
I
I
Current
Bus Hold Input
Leakage Current
Power Off Leakage
I
off
Current
I
High Impedance
OZ
Output Leakage
Current
I
∆I
Quiescent Supply
CC
Current
CCICC
incr. per Input3.0 to 3.6VIH=VCC- 0.6V500750µA
V
CC
(V)
-40 to 85 °C-55 to 125 °C
Min.Max.Min.Max.
1.65 to 1.950.65 Vcc0.65 Vcc
2.3 to 2.71.71.7
2.7 to 3.62.02.0
1.65 to 1.950.35 Vcc0.35 Vcc
2.3 to 2.70.70.7
2.7 to 3.60.80.8
1.65 to 3.6
1.65
2.3
2.3
2.7
3.0
3.0
1.65 to 3.6
1.65
2.3
2.3
2.7
3.0
3.6
1.65
1.65
2.3
2.3
3.0
3.0
3.6
0V
3.6V
3.6VI=VCCor GND
IO=-100 µAVCC-0.2VCC-0.2
I
=-4 mA
O
=-6 mA
I
O
=-12 mA
I
O
=-12 mA
I
O
=-12 mA
I
O
=-24 mA
I
O
=100 µA
I
O
=4 mA
I
O
=6 mA
I
O
=12 mA
I
O
=12 mA
I
O
=24 mA
I
O
= 0 or 3.6V
V
I
VI=0.58 V
=1.07 V
V
I
=0.7 V
V
I
=1.7 V
V
I
=0.8 V
V
I
=2 V
V
I
= 0 to 3.6 V± 500
V
I
or VO= 3.6V1020µA
I
or V
I=VIH
VO= 0 to V
IL
CC
1.21.2
2.02.0
1.71.7
2.22.2
2.42.4
2.02.0
0.20.2
0.450.45
0.40.4
0.70.7
0.40.4
0.550.55
± 5± 5µA
+25+25
-25-25
+45+45
-45-45
+75+75
-75-75
± 500
± 10± 10µA
2040µA
I
=0
O
Unit
V
V
V
µA
4/10
Page 5
AC ELECTRICAL C HARACTERISTICS
Test ConditionValue
74ALVCH16240
SymbolParameter
t
PLHtPHL
Propagation Delay
Time
V
CC
(V)
C
(pF)
R
L
(Ω)
= t
t
L
s
(ns)
1.65 to 1.953010002.017.517.5
2.3 to 2.7305002.015.315.3
-40 to 85 °C-55 to 125 °C
r
Min.Max.Min.Max.
Unit
2.7505002.515.315.3
3.0 to 3.6505002.513.913.9
t
PZLtPZH
Output Enable Time1.65 to 1.953010002.018.018.0
2.3 to 2.7305002.016.416.4
2.7505002.516.116.1
ns
3.0 to 3.6505002.515.015.0
t
PLZtPHZ
Output Disable Time 1.65 to 1.953010002.017.517.5
2.3 to 2.7305002.015.415.4
2.7505002.514.814.8
3.0 to 3.6505002.514.414.4
1) Skew isdefined astheabsolute value ofthedifference betweentheactual propagation delay for any twooutputs ofthesamedevice switching in the same direction, either HIGH or LOW (t
2) Parameter guaranteed by design
OSLH
=|t
PLHm-tPLHn
|, t
OSHL
=|t
PHLm-tPHLn
|)
CAPACITIVE CHARACTERISTICS
Test ConditionValue
=25°C
SymbolParameter
V
CC
(V)
C
C
C
OUT
C
C
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
circuit)
Input Capacitance Control
IN
Inputs
Input Capacitance Data Inputs
IN
Output Capacitance
Power Dissipation Capacitance
PD
Output enabled (note 1)
Power Dissipation Capacitance
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consequences of use of such informatio n nor for any infringement of paten ts or o ther rig hts of t hird part ies which ma y result from
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mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
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