LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE)
WITH 3.6V TOLERANT INPUTS AND OUTPUTS
PRELIMINARY DATA
■ 3.6V TOLERANT INPUTS AND OUTPUTS
■ HIGH SPEED :
= 4.6 ns (MAX.) at VCC=3.0to3.6V
t
PD
t
= 5.4 ns (MAX.) at VCC=2.3to2.7V
PD
t
= 6.5 ns (MAX.) at VCC=1.65V
PD
■ POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
|=IOL= 24mA (MIN) at VCC=3.0V
|I
OH
|I
|=IOL= 18mA (MIN) at VCC=2.3V
OH
|I
|=IOL=4mA(MIN)atVCC= 1.65V
OH
■ BUS HOLD PROVIDED ON DATA INPUTS
■26Ω SERIE RESISTORS IN OUTPUTS
■ OPERATING VOLTAGE RANGE:
(OPR) = 1.65V to 3.6V
V
CC
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16374
■ LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
■ ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
ORDER CODES
PACKAGETUBET & R
TSSOP74ALVCH162374TTR
PIN CO NNE CTION
TSSOP
DESCRIPTION
The 74ALVCH162374 is a low voltage CMOS 16
BIT D-TYPE LATCH with 3 STATE OUTPUTS
NONINVERTING fabricated with sub-micron
silicon gate and five-layer metal wiring C
2
MOS
technology. It is ideal for low power and very high
speed 1.65 to 3.6V applications; it can be
interfaced to 3.6V signal environment for both
inputs and outputs.
These flip-flops are controlled by two clock inputs
(nCK) and two output enable inputs (nOE
).
Onthepositivetransitionofthe(nCK),thenQ
outputs wi ll be set to the logic state that were
setup at the nD inputs.
While the (nOE
) in put is low, the outputs (nQ) will
be in a normal state (HIGH or LOW logic level)
and while high level the out puts will be in a hi gh
impedance state.
Any output control does not af fect the interna l
operation of flip flops; that is, the old data can be
retained or the new data can be entered even
while the out put s are off.The device circuits is
including 26Ω series resistance in the out puts.
These resistors permit to reduc e line noise in high
speed applications.
All inputsand outputs areequipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
1/11February 2003
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.
Page 2
74ALVCH162374
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
11OE
2, 3,5,6,8,9,
11, 12
13,14,16,17,
19, 20, 22, 23
242OE
252CKClock Input
36,35,33,32,
30, 29, 27, 26
47,46,44,43,
41, 40, 38, 37
481CKClock Input
4, 10, 15, 21,
28, 34, 39, 45
7, 18, 31, 42V
1Q0 to 1Q7 3-State Outputs
2Q0 to 2Q7 3-State Outputs
2D0 to 2D7 Data Inputs
1D0 to 1D7 Data Inputs
GNDGround (0V)
CC
3 State Output Enable
Input (Active LOW)
3 State Output Enable
Input (Active LOW)
Positive Supply Voltage
TRUTH TABLE
INPUTSOUTPUT
OE
HXXZ
LXNO CHANGE
LLL
LHH
CKDQ
IEC LOGIC SYMBOLS
X : Don‘t Care
Z : High Impedance
2/11
Page 3
74ALVCH162374
LOGIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
CC
V
V
V
I
IK
I
OK
I
or I
I
CC
P
T
stg
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
absolute maximum rating must be observed
1) I
O
2) V
<GND,VO>V
O
Supply Voltage
DC Input Voltage
I
DC Output Voltage (OFF State)
O
DC Output Voltage (High or Low State) (note 1)-0.5 to VCC+ 0.5
O
DC Input Diode Current
DC Output Diode Current (note 2)
DC Output Current
O
DC VCCor Ground Current per Supply Pin
GND
Power Dissipation
D
Storage Temperature
Lead Temperature (10 sec)
L
CC
-0.5 to +4.6V
-0.5 to +4.6V
-0.5 to +4.6V
V
-50mA
-50mA
± 50mA
± 100mA
400mW
-65 to +150°C
300°C
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
CC
V
V
V
I
OH,IOL
I
OH,IOL
I
OH,IOL
T
dt/dvInput Rise and Fall Time (note 1)0 to 10ns/V
1) VINfrom0.8V to 2Vat VCC=3.0V
Supply Voltage
Input Voltage
I
Output Voltage (OFF State)
O
Output Voltage (High or Low State)0 to V
O
High or Low Level Output Current (VCC= 3.0 to 3.6V)
High or Low Level Output Current (VCC= 2.3 to 2.7V)
High or Low Level Output Current (VCC= 1.65V)
Operating Temperature
op
1.65 to 3.6V
-0.3 to 3.6V
0 to 3.6V
CC
± 12mA
± 6mA
± 2mA
-55 to 125°C
V
3/11
Page 4
74ALVCH162374
DC SPECIFICATIONS
Test ConditionValue
SymbolParameter
V
V
V
I
IHOLD
High Level Input
IH
Voltage
V
Low Level Input
IL
Voltage
High Level Output
OH
Voltage
Low Level Output
OL
Voltage
Input Leakage
I
I
Current
Bus Hold Input
Leakage Current
Power Off Leakage
I
off
Current
I
High Impedance
OZ
Output Leakage
Current
I
∆I
Quiescent Supply
CC
Current
CCICC
incr. per Input3.0 to 3.6VIH=VCC- 0.6V500750µA
V
CC
(V)
-40 to 85 °C-55 to 125 °C
Min.Max.Min.Max.
1.65 to 1.950.65 Vcc0.65 Vcc
2.3 to 2.71.71.7
2.7 to 3.62.02.0
1.65 to 1.950.35 Vcc0.35 Vcc
2.3 to 2.70.70.7
2.7 to 3.60.80.8
1.65 to 3.6
1.65
2.3
2.3
2.7
3.0
3.0
1.65 to 3.6
1.65
2.3
2.3
2.7
3.0
3.6
1.65
1.65
2.3
2.3
3.0
3.0
3.6
0V
3.6V
3.6VI=VCCor GND
IO=-100 µAVCC-0.2VCC-0.2
I
=-2 mA
O
=-4 mA
I
O
=-6 mA
I
O
=-8 mA
I
O
=-6 mA
I
O
=-12 mA
I
O
=100 µA
I
O
=2 mA
I
O
=4 mA
I
O
=6 mA
I
O
=8 mA
I
O
=12 mA
I
O
= 0 or 3.6V
V
I
VI=0.58 V
=1.07 V
V
I
=0.7 V
V
I
=1.7 V
V
I
=0.8 V
V
I
=2 V
V
I
= 0 to 3.6 V
V
I
or VO= 3.6V1020µA
I
or V
I=VIH
VO= 0 to V
IL
CC
1.21.2
2.02.0
1.71.7
2.22.2
2.42.4
2.02.0
0.20.2V
0.450.45
0.40.4
0.550.55
0.60.6
0.80.8
± 5± 5µA
+25+25
-25-25
+45+45
-45-45
+75+75
-75-75
± 500± 500
± 5± 10µA
2040µA
I
=0
O
Unit
V
V
µA
4/11
Page 5
AC ELECTRICAL C HARACTERISTICS
Test ConditionValue
74ALVCH162374
SymbolParameter
t
PLHtPHL
t
PZLtPZH
t
PLZtPHZ
f
MAX
Propagation Delay
Time CK to Qn
Output Enable Time1.65 to 1.953010002.018.018.0
Output Disable Time 1.65 to 1.953010002.016.816.8
t
Setup TIme, HIGH or
s
LOW level Dn to CK
t
Hold Time High or
h
LOW level Dn to CK
t
CK Pulse Width,
w
HIGH
Maximum Clock
Pulse Frequency
V
CC
(V)
C
(pF)
R
L
(Ω)
= t
t
L
s
(ns)
-40 to 85 °C-55 to 125 °C
r
Min.Max.Min.Max.
1.65 to 1.953010002.016.516.5
2.3 to 2.7305002.015.415.4
2.7505002.515.415.4
3.0 to 3.6505002.514.614.6
2.3 to 2.7305002.016.516.5
2.7505002.516.416.4
3.0 to 3.6505002.515.215.2
2.3 to 2.7305002.015.615.6
2.7505002.51514.5
3.0 to 3.6505002.514.514.5
1.65 to 1.953010002.02.12.1
2.3 to 2.7305002.02.12.1
2.7505002.52.22.2
3.0 to 3.6505002.51.91.9
1.65 to 1.953010002.00.80.8
2.3 to 2.7305002.00.60.6
2.7505002.50.50.5
3.0 to 3.6505002.50.50.5
1.65 to 1.953010002.044
2.3 to 2.7305002.03.33.3
2.7505002.53.33.3
3.0 to 3.6505002.53.33.3
1.65 to 1.953010002.0120120
2.3 to 2.7305002.0150150
2.7505002.5200200
3.0 to 3.6505002.5300300
Unit
ns
ns
ns
ns
ns
ns
MHz
5/11
Page 6
74ALVCH162374
CAPACITIVE CHARACTERISTICS
Test ConditionValue
=25°C
SymbolParameter
V
CC
(V)
C
C
C
OUT
C
C
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
circuit)
Input Capacitance Control
IN
Inputs
Input Capacitance Data Inputs
IN
Output Capacitance
Power Dissipation Capacitance
PD
Output enabled (note 1)
Power Dissipation Capacitance
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibilit y for the
consequences of use of such informatio n nor for any infringement of paten ts or o ther rig hts of t hird part ies which ma y result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previousl y suppl ied. STM icroel ectronics produc ts are not auth orized for use as c ritica l compone nts in l ife s upport dev ices or
systems without express written approval of STMicroelectronics.
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