Datasheet 74als651, 74als652 DATASHEETS (Philips)

INTEGRATED CIRCUITS

74ALS651/74ALS651–1 74ALS652/74ALS652–1

Transceiver/register

Product specification IC05 Data Handbook

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1991 Feb 08

Philips Semiconductors Product specification

T ransceiver/register

74ALS651/74ALS651-1 74ALS652/74ALS652-1

74ALS651/651-1 Octal transceiver/register, inverting (3-State) 74ALS652/652-1 Octal transceiver/register, non-inverting (3-State)

FEA TURES

•Independent registers for A and B buses

•Multiplexed real-time and stored data

•Choice of non-inverting and inverting data paths

TYPE

74ALS651/74ALS651-1 140MHz 40mA 74ALS652/74ALS652-1 140MHz 46mA

•3-State outputs

•The -1 versions sinks 48mA I

within the ±5% VCC range

OL

DESCRIPTION

The 74LAS651 and 74ALS652 transceivers/registers consist of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output enable (OEAB, OEBA pins are provided for bus management. The 74LAS651-1 and 74ALS652-1 will sink 48mA if the V

) and select (SAB, SBA)

is limited to 5.0V ± 0.25V .

CC

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS DESCRIPTION

A0 – A7 A inputs 1.0/1.0 70µA/0.1mA B0 – B7 B inputs 1.0/1.0 70µA/0.1mA

CPAB A-to-B clock input 1.0/1.0 20µA/0.1mA CPBA B-to-A clock input 1.0/1.0 20µA/0.1mA

SAB A-to-B select input 1.0/1.0 20µA/0.1mA

SBA B-to-A select input 1.0/1.0 20µA/0.1mA OEAB A-to-B output enable input 1.0/1.0 20µA/0.1mA OEBA B-to-A output enable input 1.0/1.0 20µA/0.1mA

A0 – A7, B0 – B7 A, B outputs 750/240 15mA/24mA A0 – A7, B0 – B7 A, B outputs (-1 version) 750/480 15mA/48mA

NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.

ORDERING INFORMATION

DESCRIPTION

24-pin plastic DIP

24-pin plastic SOL

74ALS651N, 74ALS651-1N,

74ALS652N, 74ALS652-1N

74ALS651D, 74ALS651-1D,

74ALS652D, 74ALS652-1D

74ALS (U.L.)

HIGH/LOW

TYPICAL

f

MAX

ORDER CODE

COMMERCIAL RANGE

V

= 5V ±10%,

CC

T

= 0°C to +70°C

amb

SUPPLY CURRENT

LOAD VALUE

HIGH/LOW

TYPICAL

(TOTAL)

DRAWING

NUMBER

SOT222-1

SOT137-1

1991 Feb 08 853–1407 01670

2

Philips Semiconductors Product specification

Transceiver/register

PIN CONFIGURATION – 74ALS651/651-1

1

CPAB

2

SAB

3

OEAB

4

A0

5

A1

6

A2

7

A3

8

A4

9

A5

10

A6

11

A7

12 13

GND

LOGIC SYMBOL – 74ALS651/651-1

V

24

CC

23

CPBA

22

SBA

21

OEBA

20

B0

19

B

1

18

B

2

17

B3

16

B

4

15

B

5

14

6

B B

7

SC00127

74ALS651/74ALS651-1 74ALS652/74ALS652-1

PIN CONFIGURATION – 74ALS652/652-1

1

CPAB

2

SAB

3

OEAB

4

A0

5

A1

6

A2

7

A3

8

A4

9

A5

10

A6

11

A7

12 13

GND

LOGIC SYMBOL – 74ALS652/652-1

V

24

CC

23

CPBA

22

SBA

21

OEBA

20

B0

19

B1

18

B2

17

B3

16

B4

15

B5

14

B6 B7

SC00128

4567891011

A0 A1 A2 A3 A4 A5 A6 A7

CPAB

1

SAB

2

OEAB

3

CPBA

23

SBA

22

OEBA

21

B0 B1 B2 B3 B4 B5 B6 B7

V

= Pin 24

CC

GND = Pin 12

20 19 18 17 16 15 14 13

IEC/IEEE SYMBOL – 74ALS651/651-1

21 3 23 22 1 2

4

5 6 7 8 9 10 11

EN1 [BA] EN1 [AB]

G3

G5

C6

G7

1

6D

1

5

4D

1

5

7

1

2

7

SC00129

20

19 18 17 16 15 14 13

4567891011

A0 A1 A2 A3 A4 A5 A6 A7

CPAB

1

SAB

2

OEAB

3

CPBA

23

SBA

22

OEBA

21

B0 B1 B2 B3 B4 B5 B6 B7

V

= Pin 24

CC

GND = Pin 12

20 19 18 17 16 15 14 13

IEC/IEEE SYMBOL – 74ALS652/652-1

21 3 23 22 1 2

4

5 6 7 8 9 10 11

EN1 [BA] EN1 [AB]

G3

G5

C6

G7

1

6D

1

5

4D

1

5

7

1

2

7

SC00130

20

19 18 17 16 15 14 13

1991 Feb 08

SC00131

SC00132

3

Philips Semiconductors Product specification

Transceiver/register

BUS MANAGEMENT FUNCTIONS

The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74ALS651/74ALS651-1 and 74ALS652/74ALS652-1. The select pins determine whether data is stored or transferred through the device in real time. The output enable pins determine the direction of the data flow.

REAL TIME BUS TRANSFER

BUS B TO BUS A

BUS A

OEABOEBA

CPABCPBA SAB SBA

LLXXXL

BUS B

REAL TIME BUS TRANSFER

BUS A TO BUS B

BUS A BUS A

OEABOEBA CPABCPBA SAB SBA

HHXX LX

74ALS651/74ALS651-1 74ALS652/74ALS652-1

STORAGE FROM A, B, OR A AND B

OEABOEBA

CPABCPBA SAB SBA

XX↑XXX LXX↑XX LX↑↑XX

TRANSFER STORED DATA

TO A AND/OR B

BUS A BUS BBUS BBUS B

OEABOEBA

CPABCPBA SAB SBA

H L H or L H or L H H

SC00133

1991 Feb 08

4

Philips Semiconductors Product specification

Transceiver/register

LOGIC DIAGRAM – 74ALS651/651-1

21

OEBA

3

OEAB

23

CPBA

22

SBA

1

SPAB

2

SAB

1 OF 8 CHANNELS

4

A0

1D

C1

1D

C1

74ALS651/74ALS651-1 74ALS652/74ALS652-1

LOGIC DIAGRAM – 74ALS652/652-1

21

OEBA

3

OEAB

23

CPBA

22

SBA

1

SPAB

2

SAB

1 OF 8 CHANNELS

20

B0

4

A0

1D

C1

1D

C1

20

B0

V

= Pin 24

CC

GND = Pin 12

TO 7 OTHER CHANNELS

SC00134

V

= Pin 24

CC

GND = Pin 12

TO 7 OTHER CHANNELS

SC00135

FUNCTION TABLE

INPUTS DATA I/O OPERATING MODE

OEAB OEBA CPAB CPBA SAB SBA An Bn 74ALS651/74ALS651-1 74ALS652/74ALS652-1

L H H or L H or L X X Input Input Isolation Isolation

L H ↑ ↑ X X Input Input Store A and B data Store A and B data X H ↑ H or L X X Input Unspecified* Store A, hold B Store A, hold B H H ↑ ↑ L X Input Output Store A in both registers Store A in both registers

L X H or L ↑ X S Unspecified* Input Hold A, store B Hold A, store B

L L ↑ ↑ X L Output Input Store B in both registers Store B in both registers

L L X X X L Output Input Real time B data to A bus Real time B data to A bus

L L X H or L X H Output Input Stored B data to A bus Stored B data to A bus H H X X L X Input Output Real time A data to B bus Real time A data to B bus H H H or L X H X Input Output Stored A data to B bus Stored A data to B bus H L H or L H or L H H Output Output Stored A data to B bus Stored A data to B bus H L H or L H or L H H Output Output Stored B data to A bus Stored B data to A bus

NOTES:

H = High voltage level L = Low voltage level X = Don’t care * = The data output function may be enabled or disabled by various signals at the OE

enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.

↑ = Low-to-High clock transition

and DIR inputs. Data input functions are always

1991 Feb 08

5

Philips Semiconductors Product specification

I

Current applied to output in Low output state

SYMBOL

UNIT

IOLLow-level output current

Transceiver/register

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.)

SYMBOL

V

T

V

I

OUT

amb

T

CC

IN

stg

Supply voltage –0.5 to +7.0 V Input voltage –0.5 to +7.0 V

IN

Input current –30 to +5 mA Voltage applied to output in High output state –0.5 to V

pp

p

Operating free-air temperature range 0 to +70 °C Storage temperature range –65 to +150 °C

RECOMMENDED OPERATING CONDITIONS

V

CC

V V

I

IK

I

OH

T

amb

NOTE:

1. The 48mA limit applies only under the condition of V

Supply voltage 4.5 5.0 5.5 V High-level input voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

Input clamp current –18 mA High-level output current –15 mA

p

Operating free-air temperature range 0 +70 °C

PARAMETER RATING UNIT

p

All versions 48 mA

-1 version 96 mA

PARAMETER

All versions 24 mA

-1 version 48

= 5.0V ±5%.

CC

74ALS651/74ALS651-1 74ALS652/74ALS652-1

CC

LIMITS

MIN NOM MAX

1

V

mA

1991 Feb 08

6

Philips Semiconductors Product specification

SYMBOL

PARAMETER

TEST CONDITIONS

1

UNIT

CC

,

IL

,

VOHHigh level out ut voltage

All versions

CC

,

IL

,

V

OL

I

74ALS651 1

ICCSupply current (total)

74ALS652-1

Transceiver/register

74ALS651/74ALS651-1 74ALS652/74ALS652-1

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)

LIMITS

MIN TYP2MAX

VCC±10%, VIL = MAX,

-

p

VIH = MIN VCC = MIN, VIL = MAX,

V

= MIN

IH

VCC = MIN, VIL = MAX,

Low-level output voltage

-1 versions

V

I

Input clamp voltage VCC = MIN, II = I

IK

Input current at

I

maximum input voltage High-level input current

IH

I

Low-level input current

IL

I

Output current

O

4

control inputs VCC = MAX, VI = 7.0V 0.1 mA

A or B ports VCC = MAX, VI = 5.5V 0.1 mA

3

74ALS651/

-

pp

74ALS652/

-

VIH = MIN VCC = 4.75V, VIL = MAX,

V

= MIN

IH

IK

VCC = MAX, VI = 2.7V 20 µA VCC = MAX, VI = 0.4V –0.1 mA VCC = MAX, VO = 2.25V –30 –112 mA

I

CCH

I

VCC = MAX

CCL

I

CCZ

I

CCH

I

VCC = MAX

CCL

I

CCZ

IOH = –0.4mA V

IOH = –3mA 2.4 3.2 V

IOH = –15mA 2.0 V

I

= 12mA 0.25 0.40 V

OL

I

= 24mA 0.35 0.50 V

OL

I

= 48mA 0.35 0.50 V

OL

NOTES:

1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.

2. All typical values are at V

3. For I/O ports, the parameter I

4. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I

CC

= 5V, T

IH

= 25°C.

amb

and IIL include the off-state current.

– 2 V

CC

–0.73 –1.5 V

32 50 mA 45 68 mA 44 68 mA 36 58 mA 53 78 mA 49 72 mA

OS

.

AC ELECTRICAL CHARACTERISTICS FOR 74ALS651/74ALS651-1

SYMBOL PARAMETER TEST CONDITION

1991 Feb 08

f

max

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

t

PZH

t

PZL

t

PHZ

t

PLZ

LIMITS

T

= 0°C to +70°C

amb

V

= +5.0V ± 10%

CC

C

= 50pF, RL = 500Ω

L

MIN MAX

Maximum clock frequency Waveform 1 100 MHz Propagation delay

CPBA to An, CPAB to Bn Propagation delay

An to Bn or Bn to An Propagation delay

SBA to An or SAB to Bn (A or B Low) Propagation delay

SBA to An or SAB to Bn (A or B High) Output enable time

OEBA

to An

Output disable time OEBA

to An

Output enable time OEAB to Bn

Output disable time OEAB to Bn

Waveform 1

Waveform NO TAG, 3

Waveform 7 Waveform 8

7

5.0

6.0

1.0

2.0

6.0

5.0

4.0

5.0

2.0

5.0

2.0

3.0

2.0

5.0

3.0

5.0

13.0

7.0

9.0

14.0

11.0

12.0

8.0

12.0

8.0

10.0

9.0

12.0

11.0

13.0

UNIT

ns

Philips Semiconductors Product specification

Transceiver/register

AC ELECTRICAL CHARACTERISTICS FOR 74ALS652/74ALS652-1

SYMBOL PARAMETER TEST CONDITION

f

max

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

t

PZH

t

PZL

t

PHZ

t

PLZ

Maximum clock frequency Waveform 1 100 MHz Propagation delay

CPBA to An, CPAB to Bn Propagation delay

An to Bn or Bn to An Propagation delay

SBA to An or SAB to Bn (A or B Low) Propagation delay

SBA to An or SAB to Bn (A or B High) Output enable time

OEBA

to An

Output disable time OEBA

to An

Output enable time OEAB to Bn

Output disable time OEAB to Bn

Waveform 1

Waveform NO TAG, 3

Waveform 7 Waveform 8

74ALS651/74ALS651-1 74ALS652/74ALS652-1

LIMITS

T

= 0°C to +70°C

amb

V

= +5.0V ± 10%

CC

C

= 50pF, RL = 500Ω

L

MIN MAX

5.0

6.0

2.0

4.0

5.0

6.0

5.0

2.0

5.0

2.0

3.0

2.0

5.0

3.0

5.0

13.0

8.0

9.0

11.0

14.0

11.0

8.0

11.0

8.0

10.0

9.0

11.0

13.0

UNIT

ns

AC SETUP REQUIREMENTS

T

= 0°C to +70°C

amb

SYMBOL PARAMETER TEST CONDITION

t

(H)

su

t

(L)

su

t

(H)

h

t

(L)

h

t

(H)

su

t

(L)

su

t

(H)

h

t

(L)

h

t

(H)

w

t

(L)

w

Setup time, High or Low An or Bn to CPAB or CPBA

Hold time, High or Low An or Bn to CPAB or CPBA

Setup time, High or Low

1

OEBA to OEAB or OEAB to OEBA Hold time, High or Low

OEBA

to OEAB or OEAB to OEBA

Pulse width, High or Low CPAB or CPBA

Waveform 4

Waveform 5, 6

Waveform 1

NOTE:

1. Setup time is to protect against current surge caused by enabling 16 outputs (24mA per output) simultaneously.

V

= +5.0V ± 10%

CC

C

= 50pF, RL = 500Ω

L

MIN MAX

5.0

0.0

1.0

5.0

0.0

6.0

4.0

LIMITS

UNIT

ns

1991 Feb 08

8

Philips Semiconductors Product specification

Transceiver/register

AC WAVEFORMS

For all waveforms, VM = 1.3V. The shaded areas indicate when the input is permitted to change for predictable output performance.

1/f

CPBA

or

CPAB

An or Bn

V

M

t

PHL

tw(H)

max

V

M

tw(L)

V

M

V

M

t

PLH

V

M

SF00394

Waveform 1. Propagation Delay for Clock Input to Output,

Clock Pulse Width, and Maximum Clock Frequency

t

PHL

V

M

SBA or SAB

An or Bn

Bn or An

V

t

PLH

M

V

M

V

M

An or Bn

Bn or An

Waveform 2. Propagation Delay for An to Bn or Bn to An

and SAB or SBA to An or Bn

An or Bn

CPBA

or

CPAB

V

M

(H) th(H)

t

su

V

M

74ALS651/74ALS651-1 74ALS652/74ALS652-1

V

M

t

PHL

V

M

V

M

V

M

SBA or SAB

t

PLH

V

M

V

M

tsu(L) th(L)

V

An or Bn

SF00395

M

SF00396

Waveform 3. Propagation Delay for An to Bn or Bn to An

and SAB or SBA to An or Bn

OEBA

OEAB

V

tsu(L) th(L)

V

M

V

M

SF00410

Waveform 5. OEBA to OEAB Setup Time and Hold Times

OEBA

OEAB

An or Bn

V

t

PZH

M

V

M

t

PHZ

V

M

VOH -0.3V

0V

SF00412

Waveform 7. 3-State Output Enable Time to High Level and

Output Disable Time from High Level

SF00397

Waveform 4. Data Setup Time and Hold Times

OEAB

OEBA

V

M

tsu(H) th(H)

V

M

SF00411

Waveform 6. OEAB to OEBA Setup Time and Hold Times

OEBA

OEAB

An or Bn

V

t

PZL

M

V

M

t

PLZ

M

VOL +0.3V

SF00413

Waveform 8. 3-State Output Enable Time to Low Level and

Output Disable Time from Low Level

1991 Feb 08

9

Philips Semiconductors Product specification

Transceiver/register

TEST CIRCUIT AND WAVEFORMS

V

CC

V

PULSE

GENERATOR

IN

R

T

Test Circuit for 3-State and Open Collector Outputs

SWITCH POSITION

TEST SWITCH

t

PLZ

, t

PZL

closed

open collector closed

All other open

DEFINITIONS:

R

= Load resistor;

L

see AC electrical characteristics for value.

CL= Load capacitance includes jig and probe capacitance;

see AC electrical characteristics for value.

R

= Termination resistance should be equal to Z

T

pulse generators.

D.U.T.

V

OUT

R

L

C

R

L

OUT

7.0V

of

NEGATIVE PULSE

POSITIVE PULSE

Family

74ALS

90%

10%

Amplitude

74ALS651/74ALS651-1 74ALS652/74ALS652-1

t

w

V

M

10%

)

t

f

THL (tf

t

)

TLH (tr

90%

V

M

Input Pulse Definition

INPUT PULSE REQUIREMENTS

V

M

3.5V

1.3V

t

TLH (tr

t

w

Rep.Rate

1MHz

THL (tf

V

10%

)

90%

t

w

500ns

M

V

M

t

TLHtTHL

2.0ns 2.0ns

90%

10%

AMP (V)

0.3V

AMP (V)

0.3V

SC00126

1991 Feb 08

10

Philips Semiconductors Product specification

Transceiver/register

74ALS651/74ALS651–1 74ALS652/74ALS652–1

DIP24: plastic dual in-line package; 24 leads (300 mil) SOT222-1

1991 Feb 08

11

Philips Semiconductors Product specification

Transceiver/register

74ALS651/74ALS651–1 74ALS652/74ALS652–1

SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1

1991 Feb 08

12

Philips Semiconductors Product specification

Transceiver/register

74ALS651/74ALS651–1 74ALS652/74ALS652–1

DEFINITIONS

Data Sheet Identification Product Status Definition

Objective Specification

Preliminary Specification

Product Specification

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

LIFE SUPPORT APPLICA TIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected

to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381

Formative or in Design

Preproduction Product

Full Production

This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.

 Copyright Philips Electronics North America Corporation 1997

 

1991 Feb 08

13