Datasheet 74ALS623AN, 74ALS623A-1N, 74ALS623A-1D, 74ALS620AN, 74ALS620A-1N Datasheet (Philips)

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INTEGRATED CIRCUITS
74ALS620A/74ALS620A–1 74ALS623A/74ALS623A–1
Transceivers
Product specification IC05 Data Handbook
 
1991 Feb 08
Page 2
T ransceivers
74ALS620A/74ALS620A-1 74ALS623A/74ALS623A-1
74ALS620A/74ALS620A-1 Octal bus transceiver, inverting (3-State) 74ALS623A/74ALS623A-1 Octal bus transceiver, non-inverting (3-State)

FEA TURES

Octal bidirectional bus interface
3-State buffer outputs sink 24mA and source 15mA
The -1 version sinks 48mA I
TYPE
74ALS620A/620A-1 4.0ns 33mA 74ALS623A/623A-1 4.0ns 38mA

ORDERING INFORMATION

DESCRIPTION

20-pin plastic DIP
20-pin plastic SOL
74ALS620AN, 74ALS620A-1N 74ALS623AN, 74ALS623A-1N
74ALS620AD, 74ALS620A-1D 74ALS623AD, 74ALS623A-1D
within the +5% VCC range
OL
TYPICAL
PROPAGATION
SUPPLY CURRENT
DELA Y
ORDER CODE
COMMERCIAL RANGE
V
= 5V ±10%,
CC
T
= 0°C to +70°C
amb
TYPICAL
(TOTAL)
DRAWING
NUMBER
SOT146-1
SOT163-1
DESCRIPTION
The 74ALS620A and 74ALS623A are octal transceiver featuring 3-State bus compatible outputs in both transmit and receive directions. The 74ALS620A is an inverting version of the 74ALS623A. The outputs are capable of sinking 24mA and sourcing up to 15mA, providing very good capacitive drive characteristics.
The outputs for the 74ALS620A-1 and 74ALS623A are capable of sinking up to 48mA when within the ±5% V
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from B bus to A bus, depending on the logic levels at the enable inputs (OEBA the device so that the buses are effectively isolated. The dual-enable configuration gives the 74ALS620A and 74ALS623A the capability to store data by the simultaneous enabling of OEBA OEAB. Each output reinforces its input in this transceiver configuration. Thus when both control inputs are enabled and all other data sources to the two sets of the bus lines are at high impedance, both sets of the bus lines (16 in all) will remain at their last states.
and OEAB). The enable inputs can be used to disable
CC
range.
and

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS DESCRIPTION
74ALS (U.L.)
HIGH/LOW
A0 – A7, B0 – B7 Data inputs 1.0/1.0 20µA/0.1mA
OEBA, OEAB Output Enable inputs 1.0/1.0 20µA/0.1mA A0 – A7, B0 – B7 Data outputs 750/240 15mA/24mA A0 – A7, B0 – B7 Data outputs (-1 version) 750/480 15mA/48mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.

PIN CONFIGURATION – 74ALS620A/74ALS620A-1

1 2
A0
3
A1
4
A2
5
A3
6
A4
7
A5
8
A6
9
A7
10 11
GND
V
20OEAB
CC
19
OEBA
18
B0
17
B1
16
B2
15
B3
14
B4
13
B5
12
B6 B7
SC00101

PIN CONFIGURATION – 74ALS623A/74ALS623A-1

1 2
A0
3
A1
4
A2
5
A3
6
A4
7
A5
8
A6
9
A7
10 11
GND
LOAD VALUE
HIGH/LOW
V
20OEAB
CC
19
OEBA
18
B0
17
B1
16
B2
15
B3
14
B4
13
B5
12
B6 B7
SC00102
1991 Feb 08 853–0020 01670
2
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Transceivers

LOGIC SYMBOL – 74ALS620A/74ALS620A-1

23456789
A0 A1 A2 A3 A4 A5 A6 A7
1
19
VCC = Pin 20 GND = Pin 10

IEC/IEEE SYMBOL – 74ALS620A/74ALS620A-1

OEAB
OEBA
B0 B1 B2 B3 B4 B5 B6 B7
18 17 16 15 14 13 12 11
SC00103
1
19
EN1
EN2
74ALS620A/74ALS620A-1 74ALS623A/74ALS623A-1

LOGIC SYMBOL – 74ALS623A/74ALS623A-1

23456789
A0 A1 A2 A3 A4 A5 A6 A7
1
19
VCC = Pin 20 GND = Pin 10

IEC/IEEE SYMBOL – 74ALS623A/74ALS623A-1

OEAB
OEBA
B0 B1 B2 B3 B4 B5 B6 B7
18 17 16 15 14 13 12 11
SC00104
1
19
EN1
EN2
2 18
3 17
4 16
5 15
6 14
7 13
8 12
9 11
1
2
SC00105
2 18
3 17
4 16
5 15
6 14
7 13
8 12
9 11
1
2
SC00106
1991 Feb 08
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Transceivers

LOGIC DIAGRAM – 74ALS620A/74ALS620A-1

19
OEBA
1
OEAB
2
A0
3
A1
4
A2
5
A3
6
A4
18
B0
17
B1
16
B2
15
B3
14
B4
74ALS620A/74ALS620A-1 74ALS623A/74ALS623A-1

LOGIC DIAGRAM – 74ALS623A/74ALS623A-1

19
OEBA
1
OEAB
2
A0
3
A1
4
A2
5
A3
6
A4
18
B0
17
B1
16
B2
15
B3
14
B4
7
A5
8
A6
9
A7
VCC = Pin 20 GND = Pin 10

FUNCTION TABLE

INPUTS OPERATING MODES
OEBA OEAB 74ALS620A 74ALS623A
L L B data to A Bus B data to A Bus L H A data to B Bus A data to B Bus
H L Z Z
L H B data to A Bus B data to A Bus L H A data to B Bus A data to B Bus
H = High voltage level L = Low voltage level X = Don’t care Z = High impedance “off” state
13
B5
12
B6
11
B7
VCC = Pin 20
SC00107
GND = Pin 10
7
A5
8
A6
9
A7
13
B5
12
B6
11
B7
SC00108
1991 Feb 08
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I
Current applied to output in Low output state
SYMBOL
UNIT
IOLLow-level output current
Transceivers

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
V
T
V
V
I
OUT
OUT
amb
T
CC
IN
stg
Supply voltage –0.5 to +7.0 V Input voltage –0.5 to +7.0 V
IN
Input current –30 to +5 mA Voltage applied to output in High output state –0.5 to V
pp
p
Operating free-air temperature range 0 to +70 °C Storage temperature range –65 to +150 °C

RECOMMENDED OPERATING CONDITIONS

V
CC
V V
I
IK
I
OH
T
amb
NOTE:
1. The 48mA limit applies only under the condition of V
Supply voltage 4.5 5.0 5.5 V High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
Input clamp current –18 mA High-level output current –15 mA
p
Operating free-air temperature range 0 +70 °C
PARAMETER RATING UNIT
p
All versions 48 mA
-1 version 96 mA
PARAMETER
All versions 24 mA
-1 version 48
= 5.0V ±5%.
CC
74ALS620A/74ALS620A-1 74ALS623A/74ALS623A-1
CC
LIMITS
MIN NOM MAX
1
V
mA
1991 Feb 08
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SYMBOL
PARAMETER
TEST CONDITIONS
1
UNIT
CC
,
IL
,
VOHHigh level out ut voltage
All versions
CC
,
IL
,
V
OL
I
maximum in ut
74ALS620A 1
ICCSupply current (total)
74ALS623A 1
Transceivers

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)
VCC = ±10%, VIL = MAX,
V
V
High-level output voltage
Low-level output voltage
–1 versions
V
I
Input clamp voltage VCC = MIN, II = I
IK
Input current at
I
voltage High-level input current
IH
I
Low-level input current
IL
I
Output current
O
p
4
OEBA or OEAB VCC = MAX, VI = 7.0V 0.1 mA
A or B ports VCC = MAX, VI = 5.5V 0.1 mA
3
3
74ALS620A
74ALS620A-1
pp
74ALS623A
74ALS623A-1
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. For I/O ports, the parameter I
4. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
= 5V, T
CC
IH
= 25°C.
amb
and IIL include the off-state current.
VIH = MIN VCC = MIN, VIL = MAX,
V
= MIN
IH
VCC = MIN, VIL = MAX, VIH = MIN
VCC = 4.75V, VIL = MAX, V
= MIN
IH
IK
VCC = MAX, VI = 2.7V 20 µA VCC = MAX, VI = 0.4V –0.1 mA VCC = MAX, VO = 2.25V –30 –112 mA
I
CCH
I
VCC = MAX
CCL
I
CCZ
I
CCH
I
VCC = MAX
CCL
I
CCZ
74ALS623A/74ALS623A-1
LIMITS
MIN TYP2MAX
IOH = –0.4mA V
IOH = –3mA 2.4 3.2 V
IOH = –15mA 2.0 V
I
= 12mA 0.25 0.40 V
OL
I
= 24mA 0.35 0.50 V
OL
I
= 48mA 0.35 0.50 V
OL
– 2 V
CC
–0.73 –1.5 V
24 34 mA 42 49 mA 45 52 mA 24 43 mA 41 50 mA 46 55 mA
OS
74ALS620A/74ALS620A-1
.
1991 Feb 08
6
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Transceivers

AC ELECTRICAL CHARACTERISTICS FOR 74ALS620A/74ALS620A-1

SYMBOL PARAMETER TEST CONDITION
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ

AC ELECTRICAL CHARACTERISTICS FOR 74ALS623A/74ALS623A-1

SYMBOL PARAMETER TEST CONDITION
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay An to Bn, Bn to An
Output enable time OEBA
to An
Output disable time OEBA
to An
Output enable time OEAB to Bn
Output disable time OEAB to Bn
Propagation delay An to Bn, Bn to An
Output enable time OEBA
to An
Output disable time OEBA
to An
Output enable time OEAB to Bn
Output disable time OEAB to Bn
Waveform 1 Waveform 3
Waveform 4 Waveform 3
Waveform 4 Waveform 3
Waveform 4 Waveform 3
Waveform 4
Waveform 2 Waveform 3
Waveform 4 Waveform 3
Waveform 4 Waveform 3
Waveform 4 Waveform 3
Waveform 4
74ALS620A/74ALS620A-1 74ALS623A/74ALS623A-1
LIMITS
T
= 0°C to +70°C
amb
V
= +5.0V ± 10%
CC
C
= 50pF, RL = 500
L
MIN MAX
2.0
2.0
2.0
3.0
2.0
2.0
2.0
3.0
2.0
3.0
10.0
10.0
17.0
25.0
12.0
18.0
18.0
25.0
12.0
18.0
LIMITS
T
= 0°C to +70°C
amb
V
= +5.0V ± 10%
CC
C
= 50pF, RL = 500
L
MIN MAX
2.0
2.0
2.0
3.0
2.0
2.0
2.0
3.0
2.0
2.0
13.0
11.0
22.0
22.0
16.0
19.0
22.0
22.0
16.0
19.0
UNIT
ns
ns
ns
ns
ns
UNIT
ns
ns
ns
ns
ns
1991 Feb 08
7
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Transceivers

AC WAVEFORMS

For all waveforms, VM = 1.3V.
An, B
n
B
A
n,
n
Waveform 1. Propagation Delay for Inverting Outputs
OEBA
OEAB
An or Bn
Waveform 3. 3-State Output Enable Time to High Level

TEST CIRCUIT AND WAVEFORMS

V
t
PZH
M
V
t
PHL
M
V
M
V
M
t
PHZ
V
M
t
PLH
V
M
and Disable Time from High Level
V
M
SF00773
VOH -0.3V
SF00412
74ALS620A/74ALS620A-1 74ALS623A/74ALS623A-1
An, Bn
Bn, An
Waveform 2. Propagation Delay for Non-inverting Outputs
OEBA
OEAB
An or Bn
0V
Waveform 4. 3-State Output Enable Time to Low Level
and Disable Time from Low Level
V
t
PZL
V
M
t
PLH
M
V
M
t
PHL
t
PLZ
V
M
SF00202
V
M
VOL +0.3V
SF00413
V
M
V
M
V
PULSE
GENERATOR
CC
V
IN
R
T
D.U.T.
V
OUT
R
L
C
R
L
L
7.0V
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t
PLZ
, t
PZL
closed
All other open
DEFINITIONS:
R
= Load resistor;
L
see AC electrical characteristics for value.
CL= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
NEGATIVE PULSE
POSITIVE PULSE
Family
74ALS
90%
10%
Amplitude
t
w
V
M
10%
)
V
90%
M
t
THL (tf
t
TLH (tr
f
)
t
TLH (tr
t
THL (tf
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
Rep.Rate
M
3.5V
1.3V
1MHz
V
10%
)
)
90%
t
w
500ns
M
V
M
t
TLHtTHL
2.0ns 2.0ns
90%
10%
AMP (V)
0.3V
AMP (V)
0.3V
SC00072
1991 Feb 08
8
Page 9
Transceivers
74ALS620A/74ALS620A–1 74ALS623A/74ALS623A–1

DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1

1991 Feb 08
9
Page 10
Transceivers
74ALS620A/74ALS620A–1 74ALS623A/74ALS623A–1

SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

1991 Feb 08
10
Page 11
Transceivers
74ALS620A/74ALS620A–1 74ALS623A/74ALS623A–1

DEFINITIONS

Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
LIFE SUPPORT APPLICA TIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
 
1991 Feb 08
11
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