Page 1
INTEGRATED CIRCUITS
74ALS377
Octal D flip–flop with enable
Product specification
IC05 Data Handbook
1991 Feb 08
Page 2
Philips Semiconductors Product specification
74ALS377Octal D flip-flop with enable
FEA TURES
•Ideal for addressable register applications
•Enable for address and data synchronization applications
•Eight edge-triggered D-type flip-flops
•Buffered common clock
•See 74ALS273 for master reset version
•See 74ALS373 for transparent latch version
•See 74ALS374 for 3-State version
DESCRIPTION
The 74ALS377 has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered clock (CP)
input loads all flip-flops simultaneously when the Enable (E
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output. The E
input must be stable
one setup time prior to the Low-to-High clock transition for
predictable operation.
TYPE
TYPICAL f
MAX
SUPPLY CURRENT
74ALS377 95MHz 15mA
) is Low.
TYPICAL
(TOTAL)
PIN CONFIGURATION
E
1
2
Q0
3
D0
4
D1
5
Q1
6
Q2
7
D2
8
D3
9
Q3
GND
10 11
V
20
CC
19
Q7
18
D7
17
D6
16
Q6
15
Q5
14
D5
13
D4
12
Q4
CP
ORDERING INFORMA TION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
V
= 5V ±10%,
CC
T
= 0°C to +70°C
amb
20-pin plastic DIP 74ALS377N SOT146-1
20-pin plastic SOL 74ALS377D SOT163-1
20-pin plastic SSOP
Type II
74ALS377DB SOT339-1
DRAWING
NUMBER
SF00350
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
D0 – D7 Data inputs 1.0/2.0 20µA/0.2mA
CP Clock pulse input (active rising edge) 1.0/1.0 20µA/0.1mA
E Latch enable input 1.0/1.0 20µA/0.1mA
Q0 – Q7 Data outputs 130/240 2.6mA/24mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL
11
1
V
= Pin 20
CC
GND = Pin 10
CP
E
3 4 7 8 13 14 1817
D0 D1 D2 D3 D4 D5 D6 D7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2 5 6 9 12 15 16 19
SF00351
IEC/IEEE SYMBOL
74ALS (U.L.)
HIGH/LOW
1
G1
11
32
4
7
8
13
14
17
18
1C2
2D
LOAD VALUE
HIGH/LOW
5
6
9
12
15
16
19
SF00352
1991 Feb 08 853–1399 01670
2
Page 3
Philips Semiconductors Product specification
OPERATING MODE
Hold (do nothing)
74ALS377Octal D flip-flop with enable
LOGIC DIAGRAM
1
E
11
CP
VCC = Pin 20
GND = Pin 10
D0 D1 D2 D3
3478
DQ
CP
D
CP
2 5 6 9 12 15 16 19
Q0 Q1 Q2 Q3
D
QQ
CP
D4 D5 D6 D7
13 14 17 18
DQ
CP
DQ
FUNCTION TABLE
INPUTS OUTPUTS
E CP Dn Qn
l ↑ h H Load “1”
l ↑ l L Load “0”
h ↑ X NC
H X X NC
H = High-voltage level
h = High state must be present one setup time before the Low-to-High clock transition
L = Low-voltage level
l = Low state must be present one setup time before the Low-to-High clock transition
NC= No change
X = Don’t care
↑ = Low-to-High clock transition
D
CP
CP
Q4 Q5 Q6 Q7
D
QQ
CP
DQ
CP
SF00353
1991 Feb 08
3
Page 4
Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
1
UNIT
VOHHigh-level output voltage
CC
,
IL
,
VOLLow-level output voltage
CC
,
IL
,
IILLow-level input current
V
MAX, V
4V
ICCSupply current (total)
V
MAX
74ALS377Octal D flip-flop with enable
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
V
V
V
I
OUT
I
OUT
T
amb
T
CC
IN
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
IN
Input current –30 to +5 mA
Voltage applied to output in High output state –0.5 to V
Current applied to output in Low output state 48 mA
Operating free-air temperature range 0 to +70 °C
Storage temperature range –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
V
T
V
V
I
I
OH
I
OL
amb
CC
IK
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
Input clamp current –18 mA
High-level output current –2.6 mA
Low-level output current 24 mA
Operating free-air temperature range 0 +70 °C
PARAMETER RATING UNIT
CC
V
LIMITS
MIN NOM MAX
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
MIN TYP
p
p
V
I
I
IH
I
Input clamp voltage VCC = MIN, II = I
IK
Input current at maximum input voltage VCC = MAX, VI = 7.0V 0.1 mA
I
High-level input current VCC = MAX, VI = 2.7V 20 µA
E, CP
I
I
O
p
Output current
pp
3
VCC±10%, VIL = MAX,
VIH = MIN
VCC = MIN, VIL = MAX,
VIH = MIN
IK
Dn
CC
=
= 0.
I
VCC = MAX, VO = 2.25V –30 –112 mA
CCH
CCL
CC
=
IOH = –0.4mA V
IOH = MAX 2.4 3.2 V
I
= 12mA 0.25 0.40 V
OL
I
= 24mA 0.35 0.50 V
OL
– 2 V
CC
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
CC
= 5V, T
amb
= 25°C.
2
MAX
–0.73 –1.5 V
–0.1 mA
–0.2 mA
12 18 mA
20 29 mA
OS
.
1991 Feb 08
4
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Philips Semiconductors Product specification
74ALS377Octal D flip-flop with enable
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
= 0°C to +70°C
amb
V
SYMBOL PARAMETER TEST CONDITION
f
MAX
t
PLH
t
PHL
Maximum clock frequency Waveform 1 65 MHz
Propagation delay
CP to Qn
Waveform 1
AC SETUP REQUIREMENTS
SYMBOL PARAMETER TEST CONDITION
tsu(H)
t
(L)
su
th(H)
t
(L)
h
tsu(H)
t
(L)
su
th(H)
t
(L)
h
tw(H)
t
(L)
w
Setup time, High or Low
Dn to CP
Hold time, High or Low
Dn to CP
Setup time, High or Low
E
to CP
Hold time, High or Low
E
to CP
CP pulse width,
High or Low
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 1
= +5.0V ± 10%
CC
C
= 50pF, RL = 500Ω
L
MIN MAX
2.0
3.0
8.0
11.0
LIMITS
T
= 0°C to +70°C
amb
V
= +5.0V ± 10%
CC
C
= 50pF, RL = 500Ω
L
MIN MAX
5.0
5.0
0.0
0.0
1.0
1.0
3.0
3.0
6.0
8.0
UNIT
ns
UNIT
ns
ns
ns
ns
ns
AC WAVEFORMS
For all waveforms, VM = 1.3V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
max
CP
Qn
V
M
tw(H)
PHL
V
M
tw(L)t
V
M
V
M
t
PLH
V
M
SF00294
Waveform 1. Propagation Delay for Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
Dn
E
CP
Waveform 2. Data and Enable Setup and Hold Times
V
M
t
su
V
V
M
M
tsu(L)
V
M
V
M
t
h
V
t
= 0
h
V
M
tsu(H)
M
t
= 0
h
V
M
SC00076
1991 Feb 08
5
Page 6
Philips Semiconductors Product specification
74ALS377Octal D flip-flop with enable
TEST CIRCUIT AND WAVEFORMS
V
CC
PULSE
GENERATOR
V
IN
R
T
D.U.T.
V
OUT
C
R
L
L
Test Circuit for Totem-pole Outputs
DEFINITIONS:
R
= Load resistor;
L
see AC electrical characteristics for value.
CL= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
= T ermination resistance should be equal to Z
T
pulse generators.
OUT
of
NEGATIVE
PULSE
POSITIVE
PULSE
90%
10%
Family
74ALS
V
M
10%
t
THL (tf
t
TLH (tr
90%
V
M
Input Pulse Definition
Amplitude
3.5V
t
w
V
10%
)
f
)
t
)
TLH (tr
t
)
THL (tf
90%
t
w
90%
M
V
M
10%
INPUT PULSE REQUIREMENTS
V
M
1.3V
Rep.Rate
1MHz
500ns
t
w
t
TLHtTHL
2.0ns 2.0ns
AMP (V)
0.3V
AMP (V)
0.3V
SC00005
1991 Feb 08
6
Page 7
Philips Semiconductors Product specification
74ALS377Octal D flip–flop with enable
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
1991 Feb 08
7
Page 8
Philips Semiconductors Product specification
74ALS377Octal D flip–flop with enable
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
1991 Feb 08
8
Page 9
Philips Semiconductors Product specification
74ALS377Octal D flip–flop with enable
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
1991 Feb 08
9
Page 10
Philips Semiconductors Product specification
74ALS377Octal D flip–flop with enable
DEFINITIONS
Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
1991 Feb 08
10
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