Datasheet 74als241a DATASHEETS (Philips)

Page 1
INTEGRATED CIRCUITS
74ALS241A/74ALS241A–1
Octal buffer (3–state)
Product specification IC05 Data Handbook
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1991 Feb 08
Page 2
74ALS241A/74ALS241A-1Octal buffer (3-State)

FEA TURES

•Octal bus interface
•3-State buffer outputs sink 24mA and source 15mA
•The -1 version sinks 48 mA

DESCRIPTION

The 74ALS241A is an octal buffer that is ideal for driving bus lines or buffer memory address registers. The outputs are all capable of sinking 24mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The device features two output enables, OE
The 74ALS241A-1 sinks 48mA IOL if the VCC is limited to
5.0V ±0.25V.
74ALS241A-1 4.5ns 18mA
a and OEb, each controlling four of the 3-State outputs.
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74ALS241A 4.5ns 18mA

PIN CONFIGURATION

1
OEa
2
Ia0
3
Yb0
4
Ia1
5
Yb1
6
Ia2
7
Yb2
8
Ia3
9
Yb3
10 11
GND

ORDERING INFORMA TION

ORDER CODE
COMMERCIAL RANGE
DESCRIPTION
20-pin plastic DIP
20-pin plastic SOL
20-pin plastic SSOP
Type II
V
CC
T
amb
74ALS241AN,
74ALS241A-1N
74ALS241AD,
74ALS241A-1D
74ALS241ADB,
74ALS241A-1DB
V
20
CC
19
OEb
18
Ya0
17
Ib0
16
Ya1
15
Ib1
14
Ya2
13
Ib2
12
Ya3 Ib3
= 5V ±10%,
= 0°C to +70°C
SF00324
DRAWING
NUMBER
SOT146-1
SOT163-1
SOT339-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS DESCRIPTION
Ian, Ibn Data inputs 1.0/1.0 20µA/0.1mA
OEa, OEb Output Enable inputs (active-Low) 1.0/1.0 20µA/0.1mA
Yan, Ybn Data outputs 750/240 15mA/24mA Yan, Ybn Data outputs (-1 version) 750/480 15mA/48mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.

LOGIC SYMBOL

1
OEa
19
VCC = Pin 20 GND = Pin 10
OEb
2 4 6 8 17 15 13 11
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
18 16 14 12 3 5 7 9
SF00325

IEC/IEEE SYMBOL

74ALS (U.L.)
HIGH/LOW
1
19
2 4 6 8
17 15 13
11
EN1 EN2
2D
1
2
LOAD VALUE
HIGH/LOW
18 16 14 12
3 5 7 9
SF00326
1991 Feb 08 853–1276 01670
2
Page 3
I
Current applied to output in Low output state
SYMBOL
UNIT
IOLLow-level output current
74ALS241A/74ALS241A-1Octal buffer (3-State)

LOGIC DIAGRAM

2
Ia0
4
Ia1
6
Ia2
8
Ia3
1
OE
a
VCC = Pin 20 GND = Pin 10
18
Ya0
16
Ya1
14
Ya2
12
Ya3
Ib0
Ib1
Ib2
Ib3
OEb
17
15
13
11
10
3
5
7
9
Yb0
Yb1
Yb2
Yb3
SF00327

FUNCTION TABLE

OEa Ia OEb Ib Ya Yb
L L H L L L L H H H H H
H X L X Z Z
H = High voltage level L = Low voltage level X = Don’t care Z = High impedance “off” state

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
OUT
T
amb
T
stg
Supply voltage –0.5 to +7.0 V Input voltage –0.5 to +7.0 V Input current –30 to +5 mA Voltage applied to output in High output state –0.5 to V
pp
p
Operating free-air temperature range 0 to +70 °C Storage temperature range –65 to +150 °C
PARAMETER RATING UNIT
p
All versions 48 mA
-1 version 96 mA
INPUTS OUTPUTS
CC
V

RECOMMENDED OPERATING CONDITIONS

PARAMETER
V
CC
V
V
I
IK
I
OH
T
amb
NOTE:
1. The 48mA limit applies only under the condition of V
Supply voltage 4.5 5.0 5.5 V High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
Input clamp current –18 mA High-level output current –15 mA
p
Operating free-air temperature range 0 +70 °C
CC
= 5.0V ±5%.
LIMITS
MIN NOM MAX
All versions 24 mA
-1 version 48
1
mA
1991 Feb 08
3
Page 4
SYMBOL
PARAMETER
TEST CONDITIONS
1
UNIT
CC
,
IL
,
VOHHigh level out ut voltage
All versions
CC
,
IL
,
VOLLow level out ut voltage
74ALS241A/74ALS241A-1Octal buffer (3-State)

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
MIN TYP
– 2 V
CC
I
I
I
V
IK
I
I
I
IH
I
IL
OZH
OZL
I
O
CC
VCC±10%, VIL = MAX,
-
p
VIH = MIN VCC = MIN, VIL = MAX,
V
= MIN
IH
VCC = MIN, VIL = MAX,
-
p
-1 version
VIH = MIN VCC = 4.75V, VIL = MAX,
V
= MIN
IH
Input clamp voltage VCC = MIN, II = I
IK
IOH = –0.4mA V
IOH = –3mA 2.4 3.2 V
IOH = –15mA 2.0 V
I
= 12mA 0.25 0.40 V
OL
I
= 24mA 0.35 0.50 V
OL
I
= 48mA 0.35 0.50 V
OL
Input current at maximum input voltage VCC = MAX, VI = 7.0V 0.1 mA High-level input current VCC = MAX, VI = 2.7V 20 µA Low-level input current VCC = MAX, VI = 0.4V –0.1 mA Off-state output current,
High-level voltage applied Off-state output current,
Low-level voltage applied Output current
3
Supply current (total)
I
CCH
I
CCL
I
CCZ
VCC = MAX, VI = 2.7V 20 µA
VCC = MAX, VI = 0.4V –20 µA VCC = MAX, VO = 2.25V –30 –112 mA
VCC = MAX
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
= 5V, T
CC
amb
= 25°C.
2
MAX
–0.73 –1.5 V
7 15 mA 21 26 mA 25 30 mA
OS
.

AC ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER TEST CONDITION
1991 Feb 08
t t
t
PZH
t
t
PHZ
t
PLH PHL
PZL
PLZ
Propagation delay In to Yn
Output Enable time to High or Low level
Output disable time from High or Low level
LIMITS
T
= 0°C to +70°C
amb
V
= +5.0V ± 10%
CC
C
= 50pF, RL = 500Ω
L
UNIT
MIN MAX
Waveform 1 Waveform 2
Waveform 3 Waveform 2
Waveform 3
1.5
1.5
1.0
2.5
1.0
2.5
10.0
10.0
10.0
12.0
10.0
12.0
ns
ns
ns
4
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74ALS241A/74ALS241A-1Octal buffer (3-State)

AC WAVEFORMS

For all waveforms, VM = 1.3V.
Ian, Ibn
Yn
V
M
t
PLH
V
M
t
PHL
V
V
M
M
Waveform 1. Propagation Delay for Non-Inverting Output
OEa
OEb
Yn
V
M
t
PZH
V
M
t
PHZ
V
M
VOH -0.3V
Waveform 2. 3-State Output Enable Time to High Level
and Output Disable Time from High Level

TEST CIRCUIT AND WAVEFORMS

V
CC
PULSE
GENERATOR
V
IN
D.U.T.
V
OUT
R
L
SF00329
0V
SC00092
7.0V NEGATIVE
PULSE
OEn
OEb
Yn
V
M
t
PZL
V
V
M
t
PLZ
M
VOL +0.3V
Waveform 3. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
90%
t
w
TLH (tr
10%
)
V
M
V
M
10%
)
t
THL (tf
f
t
90%
AMP (V)
0.3V
3.5V
SC00093
R
T
C
R
L
L
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST SWITCH
t
PLZ
, t
PZL
closed
All other open
DEFINITIONS:
R
= Load resistor;
L
see AC electrical characteristics for value.
CL= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
POSITIVE PULSE
Family
74ALS
10%
Amplitude
t
)
TLH (tr
90%
V
M
t
THL (tf
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
Rep.Rate
M
3.5V
1.3V
1MHz
)
90%
t
w
500ns
V
M
t
TLHtTHL
2.0ns 2.0ns
10%
AMP (V)
0.3V
SC00072
1991 Feb 08
5
Page 6
Octal buffer (3–State)

DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1

74ALS241A/74ALS241A–1
1991 Feb 08
6
Page 7
Octal buffer (3–State)

SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

74ALS241A/74ALS241A–1
1991 Feb 08
7
Page 8
Octal buffer (3–State)

SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1

74ALS241A/74ALS241A–1
1991 Feb 08
8
Page 9
Octal buffer (3–State)
74ALS241A/74ALS241A–1

DEFINITIONS

Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
LIFE SUPPORT APPLICA TIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors 811 East Arques Avenue
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
 
1991 Feb 08
9
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