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74ALS164N
Datasheet (Philips)
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Datasheet 74ALS164N, 74ALS164D Datasheet (Philips)

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Page 1
INTEGRATED CIRCUITS
74ALS164
8–bit serial–in parallel–out shift register
Product specification IC05 Data Handbook
 
1991 Feb 08
Page 2
74ALS1648-bit serial-in parallel-out shift register

FEA TURES

•Gated serial data inputs
•Typical shift frequency of 75MHz
•Asynchronous master reset
•Buffered clock and data inputs
•Fully synchronous data transfer

DESCRIPTION

The 74ALS164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (Dsa, Dsb); either input can be used as an active-high enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied High.
Data shifts one place to the right on each Low-to-high transition of the clock (CP) input, and enters into Q0 the logical AND of the two data inputs (Dsa, Dsb) that existed one setup time before the rising edge. A Low level on the Master reset (MR inputs and clears the register asynchronously, forcing all outputs Low.
) input overrides all other

PIN CONFIGURATION

V
14
CC
Q7
13
Q6
12
Q5
11
Q4
10
MR
9 87
CP
TYPICAL
SUPPLY CURRENT
(TOTAL)
TYPE
Dsa Dsb
Q0 Q1 Q2 Q3
GND
1 2 3 4 5 6
TYPICAL
f
MAX
74ALS164 75MHz 10mA

ORDERING INFORMATION

ORDER CODE
DESCRIPTION COMMERCIAL RANGE
V
= 5V ±10%,
CC
T
= 0°C to +70°C
amb
14-pin plastic DIP 74ALS164N SOT27-1
14-pin plastic SO 74ALS164D SOT108-1
DRAWING
NUMBER
SF00717

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS DESCRIPTION
Dsa, Dsb Data inputs 1.0/1.0 20µA/0.1mA
CP Clock Pulse input (active rising edge) 1.0/1.0 20µA/0.1mA
MR Master Reset input (active-Low) 1.0/1.0 20µA/0.1mA
Q0 – Q7 Data outputs 20/80 0.4mA/8mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.

LOGIC SYMBOL

8
9
= Pin 14
V
CC
GND = Pin 7
12
CP
MR
Dsa Dsb
Q0
Q1 Q3 Q4
3 4 5 6 10 11 12 13
Q0 Q1 Q3 Q4
SF00713

IEC/IEEE SYMBOL

74ALS (U.L.)
HIGH/LOW
8
9
1 2
R
SRG8
C1/→
&
1D
LOAD VALUE
HIGH/LOW
3 4 5 6
10
11 12 13
SF00714
1991 Feb 08 853–1510 01670
2
Page 3
OPERATING MODE
Shift
74ALS1648-bit serial-in parallel-out shift register

LOGIC DIAGRAM

1
Dsa
2
Dsb
8
CP
9
= Pin 14
V
CC
GND = Pin 7
MR

MODE SELECT FUNCTION TABLE

INPUTS OUTPUTS
MR CP Dsa Dsb Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
L X X X L L L L L L L L Reset (Clear) H ↑ l l L q0 q1 q2 q3 q4 q5 q6 H ↑ l h L q0 q1 q2 q3 q4 q5 q6 H ↑ h l L q0 q1 q2 q3 q4 q5 q6 H ↑ h h H q0 q1 q2 q3 q4 q5 q6
NOTES:
H = High voltage level h = High voltage level one setup time prior to the Low-to-High clock transition L = Low voltage level l = Low voltage level one setup time prior to the Low-to-High clock transition qn = Lower case letter indicate the state of the referenced output one setup time prior to the Low-to-High clock transition. X = Don’t care ↑ = Low-to-High clock transition
DQ
RD
Q0
3
DQ
RD
Q1
DQ
4
RD
Q2
DQ
5
RD
Q3
DQ
6
RD
Q4
10
DQ
RD
Q5
11
DQ
RD
Q6
12
DQ
CPCPCPCPCPCPCPCP
RD
Q7
13
SF00715

APPLICATION

The 74ALS164 can be cascaded to form synchronous shift registers of longer length. Here, two devices are combined to form a 16-bit shift register.
CLEAR
CLOCK
DATA
ENABLE
Dsa Dsb
CP MR
74ALS164 74ALS164
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
D0 D1 D2 D3 D4 D5 D6 D7
H
Dsa Dsb
CP MR
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
D8 D9 D10 D11 D12 D13 D14 D15
SC00063
1991 Feb 08
3
Page 4
SYMBOL
PARAMETER
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
1
UNIT
VOLLow-level output voltage
CC
,
IL
,
74ALS1648-bit serial-in parallel-out shift register

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
V
I T
T
CC
V
I
IN
OUT
OUT
amb
stg
Supply voltage –0.5 to +7.0 V Input voltage –0.5 to +7.0 V
IN
Input current –30 to +5 mA Voltage applied to output in High output state –0.5 to V Current applied to output in Low output state 16 mA Operating free-air temperature range 0 to +70 °C Storage temperature range –65 to +150 °C

RECOMMENDED OPERATING CONDITIONS

V
T
V V
I
I
OH
I
OL
amb
CC
Ik
Supply voltage 4.5 5.0 5.5 V High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
Input clamp current –18 mA High-level output current –0.4 mA Low-level output current 8 mA Operating free-air temperature range 0 +70 °C
PARAMETER RATING UNIT
CC
V
LIMITS
MIN NOM MAX

DC ELECTRICAL CHARACTERISTICS

(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
MIN TYP
V
OH
V
I
I
IH
I
IL
I
O
I
CC
High-level output voltage VCC±10%, VIL = MAX, VIH = MIN, IOH = MAX V
I
= 4mA 0.25 0.4 V
p
Input clamp voltage VCC = MIN, II = I
IK
Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
I
VCC = MIN, VIL = MAX, VIH = MIN
IK
OL
I
= 8mA 0.35 0.50 V
OL
High-level input current VCC = MAX, VI = 2.7V 20 µA Low-level input current VCC = MAX, VI = 0.5V –0.1 mA Output current
3
VCC = MAX, VO = 2.25V –30 –112 mA
Supply current (total) VCC = MAX 10 15 mA
– 2 V
CC
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
CC
= 5V, T
amb
= 25°C.
2
MAX
–0.73 –1.5 V
OS
.
1991 Feb 08
4
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74ALS1648-bit serial-in parallel-out shift register

AC ELECTRICAL CHARACTERISTICS

LIMITS
T
= 0°C to +70°C
amb
V
SYMBOL PARAMETER TEST CONDITION
f
MAX
t
PLH
t
PHL
t
PHL
Maximum clock frequency Waveform 1 50 MHz Propagation delay
CP to Qn
Waveform 1
Propagation delay, MR to Qn Waveform 2 8.0 18.0 ns

AC SETUP REQUIREMENTS

SYMBOL PARAMETER TEST CONDITION
tsu(H)
t
su
th(H)
t
(L)
h
tw(H) t
(L)
w
tw(L) MR pulse width, Low Waveform 2 6.0 ns
t
REC
Setup time, High or Low Dn
(L)
to CP
Hold time, High or Low Dn
to CP
Clock pulse width, High or Low
Waveform 3
Waveform 3
Waveform 1
Recovery time, MR to CP Waveform 2 6.0 ns
= +5.0V ± 10%
CC
C
= 50pF, RL = 500Ω
L
MIN MAX
5.0
6.0
13.0
15.0
LIMITS
T
= 0°C to +70°C
amb
V
= +5.0V ± 10%
CC
C
= 50pF, RL = 500Ω
L
MIN MAX
6.0
5.0 0
0
10.0
7.0
UNIT
ns
UNIT
ns
ns
ns

AC WAVEFORMS

For all waveforms, VM = 1.3V. The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
max
CP
Qn
V
M
tw(H)
PHL
V
M
tw(L)t
V
M
V
M
t
PLH
V
M
SF00294
Waveform 1. Propagation Delay for Clock Input to Output,
Clock Pulse Width,
and Maximum Clock Frequency
CP
Dn
V
V
M
M
th(H)tsu(H)
V
M
V
V
M
M
th(L)tsu(L)
V
M
SC00064
Waveform 3. Data Setup and Hold Times
MR
CP
Qn
V
M
tw(L)
t
PHL
Waveform 2. Master Reset Pulse Width,
Master Reset to Output Delay,
and Master Reset to Clock Recovery Time
V
M
t
REC
V
M
V
M
SC00065
1991 Feb 08
5
Page 6
74ALS1648-bit serial-in parallel-out shift register

TEST CIRCUIT AND WAVEFORMS

V
CC
PULSE
GENERATOR
V
IN
R
T
D.U.T.
V
OUT
C
R
L
L
Test Circuit for Totem-pole Outputs
DEFINITIONS:
R
= Load resistor;
L
see AC electrical characteristics for value.
CL= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
NEGATIVE PULSE
POSITIVE PULSE
90%
10%
Family
74ALS
V
M
10%
t
THL (tf
t
TLH (tr
90%
V
M
Input Pulse Definition
Amplitude
3.5V
t
w
V
10%
)
f
)
t
)
TLH (tr
t
)
THL (tf
90%
t
w
90%
M
V
M
10%
INPUT PULSE REQUIREMENTS
V
M
1.3V
Rep.Rate
1MHz
500ns
t
w
t
TLHtTHL
2.0ns 2.0ns
AMP (V)
0.3V
AMP (V)
0.3V
SC00005
1991 Feb 08
6
Page 7
74ALS1648–bit serial–in parallel–out shift register

DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1

1991 Feb 08
7
Page 8
74ALS1648–bit serial–in parallel–out shift register

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

1991 Feb 08
8
Page 9
74ALS1648–bit serial–in parallel–out shift register

DEFINITIONS

Data Sheet Identification Product Status Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
LIFE SUPPORT APPLICA TIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
 
1991 Feb 08
9
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