The 74AHC1G/AHCT1G07 provides the non-inverting
buffer.
The output of the 74AHC1G/AHCT1G07 devices is an
open drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or
active-HIGH wired-AND functions. For digital operation
this device must have a pull-up resistor to establish a logic
HIGH-level.
74AHC1G07;
74AHCT1G07
TYPICAL
UNIT
AHC1GAHCT1G
5.06.5pF
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V
= input frequency in MHz;
f
i
2
× fi+(CL×V
CC
CC
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC= supply voltage in Volts.
2. The condition is VI= GND to VCC.
FUNCTION TABLE
See note 1.
INPUTOUTPUT
inAoutY
LL
HZ
Note
1. H = HIGH voltage level;
L = LOW voltage level;
Z = high impedance OFF-state.
2
× fo) where:
2000 May 022
Page 3
Philips SemiconductorsProduct specification
Buffer with open-drain output
74AHC1G07;
74AHCT1G07
ORDERING AND PACKAGE INFORMATION
PACKAGES
TYPE NUMBER
74AHC1G07GW−40 to +125 °C5SC-88AplasticSOT353AS
74AHCT1G07GW5SC-88AplasticSOT353CS
PINNING
SYMBOLPINDESCRIPTION
n.c.1not connected
inA2data input
GND3ground (0 V)
outY4data output
V
CC
TEMPERATURE
RANGE
5DC supply voltage
PINSPACKAGEMATERIALCODEMARKING
handbook, halfpage
n.c.
inA
GND
1
2
07
3
MNA588
V
5
outY
4
Fig.1 Pin configuration.
CC
handbook, halfpage
inAoutY
2
MNA589
Fig.2 Logic symbol.
4
2000 May 023
Page 4
Philips SemiconductorsProduct specification
Buffer with open-drain output
handbook, halfpage
2
inA
MNA590
Fig.3 IEC logic symbol.
4
outY
handbook, halfpage
74AHC1G07;
74AHCT1G07
outY
inA
GND
Fig.4 Logic diagram.
MNA591
RECOMMENDED OPERATING CONDITIONS
SYMBOLPARAMETERCONDITIONS
V
CC
V
I
V
O
DC supply voltage2.05.05.54.55.05.5V
input voltage0−5.50−5.5V
output voltageactive mode0−V
high-impedance mode0−6.00−6.0V
T
amb
operating ambient
temperature
see DC and AC
characteristics per
device
t
, t
r
f
(∆t/∆f)
input rise and fall times
ratios (except for
Schmitt-trigger inputs)
VCC= 3.3 ±0.3 V−−100−−−ns/V
V
=5±0.5 V−−20−−20ns/V
CC
74AHC74AHCT
UNIT
MIN.TYP.MAX.MIN.TYP.MAX.
0−V
CC
CC
V
−40+25+85−40+25+85°C
−40+25+125−40+25+125°C
2000 May 024
Page 5
Philips SemiconductorsProduct specification
Buffer with open-drain output
74AHC1G07;
74AHCT1G07
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
CC
V
I
I
IK
I
OK
V
O
I
O
I
CC
T
stg
P
D
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 55 °C the value of P
DC supply voltage−0.5+7.0V
input voltage−0.5+7.0V
DC input diode currentVI< −0.5 V; note 1−−20mA
DC output clamping diode
VO< −0.5 V; note 1−±20mA
current
output voltageactive mode; note 1−0.5VCC+ 0.5 V
high-impedance mode; note 1−0.57.0V
DC output sink currentVO> −0.5 V−±25mA
DC VCC or GND current−±75mA
storage temperature−65+150°C
power dissipation per packagefor temperature range:
−200mW
−40 to +125 °C; note 2
derates linearly with 2.5 mW/K.
D
2000 May 025
Page 6
Philips SemiconductorsProduct specification
Buffer with open-drain output
DC CHARACTERISTICS
74AHC1G family
Over recommended operating conditions; voltages are referenced to GND (ground=0V).
amb
(°C)
SYMBOLPARAMETER
V
IH
HIGH-level input
voltage
V
IL
LOW-level input
voltage
V
OL
LOW-level output
voltage
I
I
input leakage
current
I
OZ
3-state output
OFF-state current
I
CC
quiescent supply
current
C
I
input capacitance−−1.510−10−10pF
TEST CONDITIONST
25−40 to +85−40 to +125
OTHERVCC(V)
MIN.TYP. MAX. MIN. MAX. MIN. MAX.
2.01.5−−1.5−1.5−V
3.02.1−−2.1−2.1−V
5.53.85−−3.85−3.85−V
2.0−−0.5−0.5−0.5V
3.0−−0.9−0.9−0.9V
5.5−−1.65−1.65−1.65V
VI=VIHor VIL;
IO=50µA
2.0−00.1−0.1−0.1V
3.0−00.1−0.1−0.1V
4.5−00.1−0.1−0.1V
V
I=VIH
or VIL;
3.0−−0.36−0.44−0.55V
IO=4mA
V
I=VIH
or VIL;
4.5−−0.36−0.44−0.55V
IO=8mA
VI=VCCor GND5.5−−0.1−1.0−2.0µA
VI=VIHor VIL;
5.5−−±0.25 −±2.5−±10.0 µA
VO=VCCor GND
VI=VCCor GND;
5.5−−1.0−10−20µA
IO=0
74AHC1G07;
74AHCT1G07
UNIT
2000 May 026
Page 7
Philips SemiconductorsProduct specification
Buffer with open-drain output
74AHCT1G family
Over recommended operating conditions; voltages are referenced to GND (ground=0V).
SYMBOLPARAMETER
V
IH
HIGH-level input
voltage
V
IL
LOW-level input
voltage
V
OL
LOW-leveloutput
voltage
I
I
input leakage
current
I
OZ
3-state output
OFF-state
current
I
CC
quiescent supply
current
∆I
CC
additional
quiescent supply
current per input
pin
C
I
input
capacitance
TEST CONDITIONST
25−40 to +85−40 to +125
OTHERVCC(V)
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
4.5 to 5.5 2.0−−2.0−2.0−V
4.5 to 5.5 −−0.8−0.8−0.8V
VI=VIHor VIL;
4.5−00.1−0.1−0.1V
IO=50µA
V
I=VIH
or VIL;
4.5−−0.36−0.44−0.55V
IO=8mA
VI=VCCor GND5.5−−0.1−1.0−2.0µA
VI=VIHor VIL;
5.5−−±0.25 −±2.5−±10.0 µA
VO=VCCor GND
VI=VCCor GND;
5.5−−1.0−10−20µA
IO=0
VI= 3.4 V;
4.5 to 5.5 −−1.35−1.5−1.5mA
other inputs at
VCCor GND;
IO=0
−−1.510−10−10pF
amb
(°C)
74AHC1G07;
74AHCT1G07
UNIT
2000 May 027
Page 8
Philips SemiconductorsProduct specification
Buffer with open-drain output
AC CHARACTERISTICS
Type 74AHC1G07
GND = 0 V; tr=tf≤3.0 ns.
TEST CONDITIONST
SYMBOLPARAMETER
VCC= 3.0 to 3.6 V; note 1
t
t
t
t
PZL
PLZ
PZL
PLZ
propagation delay
inA to outY
propagation delay
inA to outY
VCC= 4.5 to 5.5 V; note 2
t
t
t
t
PZL
PLZ
PZL
PLZ
propagation delay
inA to outY
propagation delay
inA to outY
WAVEFORMSC
see Figs 5 and 6 15 pF −3.55.61.06.31.07.0ns
see Figs 5 and 6 50 pF −5.08.01.09.01.010.0ns
see Figs 5 and 6 15 pF −2.53.91.04.61.04.9ns
see Figs 5 and 6 50 pF −3.65.51.06.51.07.0ns
74AHC1G07;
74AHCT1G07
(°C)
amb
25−40 to +85−40 to +125
L
MIN.TYP. MAX. MIN. MAX. MIN. MAX.
−5.87.91.08.41.08.9ns
−8.311.51.012.01.012.5ns
−4.25.11.05.61.06.1ns
−6.07.51.08.01.08.5ns
UNIT
Notes
1. Typical values at V
CC
= 3.3 V.
2. Typical values at VCC= 5.0 V.
Type 74AHCT1G07
GND = 0 V; tr=tf≤3.0 ns.
SYMBOLPARAMETER
VCC= 4.5 to 5.5 V; note 1
t
t
t
t
PZL
PLZ
PZL
PLZ
propagation delay
inA to outY
propagation delay
inA to outY
Note
1. Typical values at V
CC
= 5.0 V.
TEST CONDITIONST
25−40 to +85−40 to +125
WAVEFORMSC
L
MIN.TYP. MAX. MIN. MAX. MIN. MAX.
amb
(°C)
UNIT
see Figs 5 and 6 15 pF −2.84.61.05.31.05.6ns
−3.95.61.06.11.06.6ns
see Figs 5 and 6 50 pF −4.06.51.07.51.08.0ns
−5.58.01.08.51.09.0ns
2000 May 028
Page 9
Philips SemiconductorsProduct specification
Buffer with open-drain output
AC WAVEFORMS
handbook, full pagewidth
inA input
outY output
FAMILY
AHC1GGND to V
VI INPUT
REQUIREMENTS
CC
AHCT1GGND to 3.0 V1.5 V50% V
V
I
GND
V
CC
V
OL
(1)
V
M
INPUT
50% VCC50% V
(1)
V
M
t
PLZ
(2)
V
M
OUTPUT
CC
CC
VOL + 0.3 V
t
PZL
74AHC1G07;
74AHCT1G07
(2)
V
M
MNA592
handbook, full pagewidth
TESTS1
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
open
V
CC
GND
Fig.5 The input inA to output outY propagation delays.
S1
V
CC
V
CC
V
PULSE
GENERATOR
Definitions for test circuit:
CL= Load capacitance including jig and probe capacitance (see Chapter “AC characteristics”).
RT= Termination resistance should be equaltothe output impedance Z0of the pulse generator.
I
R
D.U.T.
T
V
O
RL =
1000 Ω
C
L
MNA232
open
GND
Fig.6 Load circuitry for switching times.
2000 May 029
Page 10
Philips SemiconductorsProduct specification
Buffer with open-drain output
74AHC1G07;
74AHCT1G07
PACKAGE OUTLINE
Plastic surface mounted package; 5 leadsSOT353
D
y
E
H
E
AB
45
X
v M
A
132
e
1
DIMENSIONS (mm are the original dimensions)
A
UNIT
mm
A
1.1
0.8
max
0.1
1
b
p
0.30
0.25
0.20
0.10
b
p
e
cD
2.2
1.8
A
wBM
012 mm
scale
E
1.35
1.15
(2)
1.3
e
0.65
H
E
1
2.2
0.45
2.0
0.15
e
A
1
detail X
L
Qywv
p
0.25
0.15
0.20.10.2
Q
L
p
c
OUTLINE
VERSION
SOT353
IEC JEDEC EIAJ
REFERENCES
2000 May 0210
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28SC-88A
Page 11
Philips SemiconductorsProduct specification
Buffer with open-drain output
SOLDERING
Introduction to soldering surface mount packages
Thistextgivesaverybriefinsighttoacomplextechnology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave solderingis not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
74AHC1G07;
74AHCT1G07
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• Forpackageswithleadsonfoursides,thefootprintmust
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2000 May 0211
Page 12
Philips SemiconductorsProduct specification
Buffer with open-drain output
74AHC1G07;
74AHCT1G07
Suitability of surface mount IC packages for wave and reflow soldering methods
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
, SO, SOJsuitablesuitable
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
The package footprint must incorporate solder thieves downstream and at the side corners.
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
Objective specificationDevelopmentThis data sheet contains the design target or goal specifications for
Preliminary specificationQualificationThis data sheet contains preliminary data, and supplementary data will be
Product specificationProductionThis data sheet contains final specifications. Philips Semiconductors
Note
1. Please consult the most recently issued data sheet before initiating or completing a design.
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratanyotherconditionsabovethosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswill be
suitable for the specified use without further testing or
modification.
PRODUCT
STATUS
DEFINITIONS
product development. Specification may change in any manner without
notice.
published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.
reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to resultin personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyoftheseproducts,conveysnolicenceortitle
under any patent, copyright, or mask work right to these
products,andmakesnorepresentations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
(1)
2000 May 0213
Page 14
Philips SemiconductorsProduct specification
Buffer with open-drain output
74AHC1G07;
74AHCT1G07
NOTES
2000 May 0214
Page 15
Philips SemiconductorsProduct specification
Buffer with open-drain output
74AHC1G07;
74AHCT1G07
NOTES
2000 May 0215
Page 16
Philips Semiconductors – a w orldwide compan y
Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
2000
Internet: http://www.semiconductors.philips.com
69
Printed in The Netherlands613507/01/pp16 Date of release: 2000 May 02Document order number: 9397 750 07041
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