Datasheet 74ACT374 Datasheet (SGS Thomson Microelectronics)

WITH 3 STATE OUTPUT NON INVERTING

■ HIGH SPEED:

=260MHz (TYP.) at VCC=5V

f

MAX

■ LOWPOWERDISSIPATION:

=8µA (MAX.) at TA=25oC

I

CC

■ COMPATIBLEWITHTTLOUTPUTS

V

=2V(MIN),VIL= 0.8V (MAX)

IH

■ 50Ω TRANSMISSION LINE DRIVING

CAPABILITY

■ SYMMETRICAL OUTPUT IMPEDANCE:

|I

|=IOL=24mA (MIN)

OH

■ BALANCEDPROPAGATIONDELAY S:

≅ t

t

PLH

PHL

■ OPERATINGVOLTAGERAN GE:

V

(OPR)= 4.5V to 5.5V

CC

■ PIN AND FUNCTION COMPATIBLE WITH

74SERIES374

■ IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The ACT374 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP FLOP with 3 STATE
OUTPUT NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C
power applications mantaining high speed
operation similar to equivalent Bipolar Schottky
TTL.

These 8 bit D-Type flip-flops are controlled by a
clockinput (CK) andan output enableinput (OE).

2

MOS technology. It is ideal for low

74ACT374

OCTAL D-TYPE FLIP FLOP

B

(Plastic Package)

(Micro Package)

ORDER CODES :

74ACT374B 74ACT374M

On the positive transition of the clock, the Q
outputs will be set to logic state that were setup
at the D inputs.

While the (OE) input is low, the 8 outputs will be
in a normal logic state (high or low logic level)
and while high level the outputs will be in a high
impedancestate.

The output control does not affect the internal
operation of flip flop; that is, the old data can be
retained or the new data can be entered even
while the outputsare off.

The device is designed to interface directly High
Speed CMOS system with TTL and NMOS
components.

All inputs and outputs are equipped with
protectioncircuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.

M

PINCONNECTION AND IEC LOGIC SYMBOLS

April 1997

1/10

74ACT374

INPUTAND OUTPUTEQUIVALENT CIRCUIT PIN DESCRIPTION

PI N No SYM B O L NAME AND FUNCT I ON

1 OE 3 State Output Enable

2, 5, 6, 9,

12, 15, 16,

19

3, 4, 7, 8,

13, 14, 17,

18
11 CLOCK Clock Input (LOW to

10 GND Ground (0V)
20 V

TRUTH TABLE

INPUTS OUTPUTS

OE CK D Q

HXXZ
L X NO CHANGE
LLL
LHH

X:DON’T CARE
Z:HIGHIMPEDANCE

Q0 to Q7 3 State Outputs

D0 to D7 Data Inputs

CC

Input (Active LOW)

HIGH, edge triggered)

Positive Supply Voltage

LOGICDIAGRAMS

2/10

74ACT374

ABSOLUTE MAXIMUM RATINGS

Symb o l Parame t er Val u e Uni t

V

V

V

I

I

OK

I

orI

I

CC

T

T

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnot implied.

RECOMMENDED OPERATINGCONDITIONS

Symbol Parameter Valu e Unit

V

V

V

T

dt/dv Input Rise and Fall Time V

1) VINfrom0.8V to2.0V

Supply Voltage -0.5 to +7 V

CC

DC Input Voltage -0.5 to VCC+ 0.5 V

I

DC Output Voltage -0.5 to VCC+ 0.5 V

O

DC Input Diode Current ± 20 mA

IK

DC Output Diode Current ± 20 mA
DC Output Current ± 50 mA

O

DC VCCor Ground Current ± 400 mA

GND

Storage Temperature -65 to +150

stg

Lead Temperature (10 sec) 300

L

Supply Voltage 4.5 to 5.5 V

CC

Input Voltage 0 to V

I

Output Voltage 0 to V

O

Operating Temperature: -40to +85

op

= 4.5 to 5.5V (note 1) 8 ns/V

CC

CC
CC

o

C

o

C

V
V

o

C

3/10

74ACT374

DC SPECIFICATIONS

Symbol Parameter Test Condition s Value Unit

T

V

CC

(V)

High Level Input Voltage 4.5 VO= 0.1 V or

V

IH

5.5 2.0 1.5 2.0

Low Level Input Voltage 4.5 VO= 0.1 V or

V

IL

5.5 1.5 0.8 0.8

High Level Output

V

OH

Voltage

4.5

5.5 I

4.5 I

5.5 I

Low Level Output

V

OL

Voltage

4.5

5.5 I

4.5 I

5.5 I

Input Leakage Current

I

I

3 State Output Leakage

I

OZ

5.5

5.5 VI=VIHor V

Current
Max ICC/Input 5.5 VI=VCC-2.1 V 0.6 1.5 mA

I

CCT

Quiescent Supply

I

CC

5.5 VI=VCCor GND 8 80 µA

V

- 0.1 V

CC

- 0.1 V

V

CC

IO=-50 µA 4.4 4.49 4.4

(*)

=

V

I

V

IH

V

IL

(*)

V

I

V

IH

V

IL

=-50 µA 5.4 5.49 5.4

O

or

=-24 mA 3.86 3.76

O

=-24 mA 4.86 4.76

O

IO=50 µA 0.001 0.1 0.1

=

=50 mA 0.001 0.1 0.1

O

or

=24 mA 0.36 0.44

O

=24 mA 0.36 0.44

O

VI=VCCor GND ±0.1 ±1 µA

VO=VCCor GND

IL

=25oC-40to85

A

Min. Typ. Max. Min . Max.

2.0 1.5 2.0

1.5 0.8 0.8

±0.5 ±5 µA

o

C

Current
Dynamic Output Current

I

OLD

OHD

(note 1, 2)

I

1) Maximum test duration 2ms, one output loaded at time

2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 Ω.
(*)All outputs loaded.

5.5 V

= 1.65 V max 75 mA

OLD

V

= 3.85 V min -75 mA

OHD

V

V

V

V

4/10

AC ELECTRICAL CHARACTERISTICS (CL= 50 pF, RL=500 Ω, Input tr=tf=3ns)

74ACT374

Symbol Parameter Test Condition Value Unit

o

C

t

Propagation Delay Time

PLH

t

CK to Q

PHL

Output Enable Time 5.0

t

PZL

t

PZH

t

Output Disable Time 5.0

PLZ

t

PHZ

t

CK Pulse Width, HIGH

w

V

(V)

5.0

5.0

CC

T

=25oC-40to85

A

Min. Typ. Max. Min . Max.

(*)

(*)

(*)

(*)

5.0 10.0 11.0 ns

6.0 10.0 11.0 ns

6.5 10.0 11.0 ns

1.5 5.0 5.0 ns

or LOW
Setup Time Q to CK

t

s

5.0

(*)

0.5 5.0 5.0 ns

HIGH or LOW
Hold Time Q to CK

t

h

5.0

(*)

-0.5 2.0 2.0 ns

HIGH or LOW

f

MAX

Maximim Clock

5.0

(*)

100 260 85 MHz

Frequency

(*) Voltage rangeis5V ±0.5V

CAPACITIVE CHARACTERISTICS

Symbol Parameter Test Condition s Value Unit

T

V

CC

(V)

C

Output Capacitance

OUT

Input Capacitance

C

IN

Power Dissipation

C

PD

5.0

5.0

5.0 25 pF

=25oC-40to85

A

Min. Typ. Max. Min . Max.

8
4

Capacitance (note 1)

1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to
Test Circuit). Average operating current can be obtained by the following equation. I

(opr)= CPD• VCC•fIN+ICC/n (percircuit)

CC

o

C

pF
pF

5/10

74ACT374

TEST CIRCUIT

TEST SWITCH

t

PLH,tPHL

t

PZL,tPLZ

t

PZH,tPHZ

CL= 50 pF or equivalent (includes jig and probe capacitance)

= 500Ω or equivalent

R

L=R1

R

of pulse generator (typically 50Ω)

T=ZOUT

Open

2V

CC

Open

WAVEFORM 1: PROPAGATIONDELAYS, SETUP AND HOLD TIMES (f=1MHz;50% duty cycle)

6/10

WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES(f=1MHz;50% duty cycle)

74ACT374

WAVEFORM 3: PULSE WIDTH

7/10

74ACT374

Plastic DIP20 (0.25)MECHANICAL DATA

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

a1 0.254 0.010

B 1.39 1.65 0.055 0.065
b 0.45 0.018

b1 0.25 0.010

D 25.4 1.000

E 8.5 0.335
e 2.54 0.100

e3 22.86 0.900

F 7.1 0.280

I 3.93 0.155
L 3.3 0.130
Z 1.34 0.053

mm inch

8/10

P001J

SO20 MECHANICAL DATA

74ACT374

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

A 2.65 0.104

a1 0.10 0.20 0.004 0.007
a2 2.45 0.096

b 0.35 0.49 0.013 0.019

b1 0.23 0.32 0.009 0.012

C 0.50 0.020

c1 45° (typ.)

D 12.60 13.00 0.496 0.512

E 10.00 10.65 0.393 0.419
e 1.27 0.050

e3 11.43 0.450

F 7.40 7.60 0.291 0.299
L 0.50 1.27 0.19 0.050

M 0.75 0.029

S8°(max.)

mm inch

P013L

9/10

74ACT374

Information furnished is believed tobe accurate and reliable. However,SGS-THOMSON Microelectronics assumesno responsability for the
consequencesof use ofsuch information nor for anyinfringement of patents or otherrights of third parties which may resultsfrom its use. No
licenseisgranted by implicationor otherwise underany patentor patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publicationare subject to change withoutnotice.This publication supersedes andreplaces all information previouslysupplied.
SGS-THOMSONMicroelectronics productsare notauthorized for useas criticalcomponents in lifesupportdevicesor systemswithoutexpress
writtenapproval of SGS-THOMSONMicroelectonics.

 1997 SGS-THOMSONMicroelectronics- Printedin Italy - AllRights Reserved

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