The 74ACT16244 is a low voltage CMOS 16-BIT
D-TYPE LATCHand 16 BIT BUS TRANSCEIVER
with 3-STATE ou tput non inverting fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
Both functions can be used as 16 bit or dual octal
devices,so the 16 bittransceivercan be used ad 8
bit bus buffer plus 8 bit tran scei ver, or only 16 bit
buffer in selec t direction.
= 4.8ns (TYP.) at VCC=5V
PD
74ACT32701
PRELIMINARY DATA
LFBGA96
(Top and Bottom view)
ORDER CODES
PACKAGETRAYT & R
LFBGA9674ACT32701LB74ACT32701LBR
This d ev ice can be used to integrate in one chip
the internal logic component required to S TV 0701
to work ad P.O.D. interface in Digital TV
application. It is ideal for low power and high
speed 4.5 to 5.5. applications.
All inputsand outputs areequipped with
protection circuits against st atic discharge, giving
them ESD immunity and transient excess voltage.
LOGIC DIAGRAM
1/9July 2003
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.
INPUT AND OUTPUT EQUIVALENT CIRCUITTRUTH TABLE (e ac h 8bit section of 16bit Latch)
INPUTSOUTPUT
OE
LEDQ
LHHH
LHLL
LLX
Q
0
HXXZ
TRUTH TABLE (each 8bit s ection of 16bit
Transceiver)
INPUTS
G
DIR
LLB data to A bus
LHA data to B bus
HXIsolation
X : Don‘tCare
Z : High Impedance
OPERATION
2/9
Page 3
74ACT32701
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
V
I
I
OK
I
or I
I
CC
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
V
T
dt/dv
1) VINfrom0.8V to 2.0V
Supply Voltage
CC
DC Input Voltage-0.5 to VCC+ 0.5
I
DC Output Voltage-0.5 to VCC+ 0.5
O
DC Input Diode Current
IK
DC Output Diode Current
DC Output Current
O
DC VCCor Ground Current
GND
Storage Temperature
stg
Lead Temperature (10 sec)
L
Supply Voltage
CC
Input Voltage0 to V
I
Output Voltage0 to V
O
Operating Temperature
op
Input Rise and Fall Time V
= 4.5 to 5.5V (note 1)
CC
-0.5 to +7V
± 20mA
± 20mA
± 50mA
± 400mA
-65 to +150°C
300°C
4.5 to 5.5V
CC
CC
-40 to 85°C
8ns/V
V
V
V
V
3/9
Page 4
74ACT32701
DC SPECIFICATIONS
Test ConditionValue
SymbolParameter
V
V
V
I
I
I
OHD
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
High Level Input Voltage4.5
IH
V
Low Level Input Voltage4.5
IL
High Level Output Voltage
OH
Low Level Output Voltage
OL
Input Leakage Current
I
I
High Impedance Output
I
OZ
Leakage Current
Max ICC/Input
CCT
Quiescent Supply Current
I
CC
OLD
Dynamic Output Current
(note 1, 2)
V
CC
(V)
= 0.1 V or VCC-0.1V
V
O
= 0.1 V or VCC-0.1V
V
5.50.80.8
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
5.5
5.5
5.5
5.5
5.5
O
IO=-50 µA
=-50 µA
I
O
=-24 mA
I
O
=-24 mA
I
O
IO=50 µA
=50 µA
I
O
=24 mA
I
O
=24 mA
I
O
VI=VCCor GND
VI=VIHor V
V
or GND
CC
VI=VCC- 2.1V
VI=VCCor GND
= 1.65 V max
V
OLD
V
= 3.85 V min.
OHD
VO=
IIL
Min.Typ. Max. Min. Max.
2.02.0
4.44.494.4
5.45.495.4
3.863.76
4.864.76
= 25°C
T
A
-40 to 85°C
0.80.8
0.0010.10.1
0.0010.10.1
0.360.44
0.360.44
± 0.1± 1µA
± 0.5± 5µA
0.91mA
880µA
75mA
-75mA
Unit
V5.52.02.0
V
V
AC ELECTRICAL CHARACTERISTICS (CL=50pF,RL= 500 Ω, In put tr=tf=3ns)
Test ConditionValue
= 25°C
SymbolParameter
t
t
t
t
t
t
(*) Voltage range is5.0V ± 0.5V
Propagation Delay Time
PLH
PHL
Output Enable Time
PZL
PZH
Output Disable Time
PLZ
PHZ
V
(V)
5.0
5.0
5.0
CC
(*)
(*)
(*)
T
A
Min.Typ. Max. Min. Max.
2.03.35.02.06.0
3.04.86.53.08.0
4.06.58.74.09.7
3.05.57.73.08.8
4.06.08.04.09.2
3.04.66.43.07.3
-40 to 85°C
Unit
ns
ns
ns
4/9
Page 5
74ACT32701
CAPACITIVE CHARACTERISTICS
Test ConditionValue
= 25°C
SymbolParameter
V
CC
(V)
C
C
C
1) CPDis defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
Input Capacitance
IN
Output Capacitance
OUT
Power Dissipation Capaci-
PD
tance (note 1)
5.03.6pF
5.011pF
= 10MHz
5.0
f
IN
T
A
Min.Typ. Max. Min. Max.
42pF
CC(opr)=CPDxVCCxfIN+ICC
TEST CIRCUIT
-40 to 85°C
/n(percircuit)
Unit
TestSwitch
t
PLH,tPHL
t
PZL,tPLZ
t
PZH,tPHZ
CL= 50pF or equivalent (includes jig and probe capacitance)
=500Ωor equivalent
R
L=R1
R
T=ZOUT
of pulse generator (typically 50Ω)
Open
2V
CC
GND
5/9
Page 6
74ACT32701
WAVEFORM 1: PROPAG ATION DE LAYS (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use o f suc h inf ormat ion n or f or an y infr ingeme nt of paten ts or oth er ri gh ts of third part ies whic h may resul t f rom
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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