Datasheet 74abt833 DATASHEETS (Philips)

INTEGRATED CIRCUITS

74ABT833

Octal transceiver with parity
generator/checker (3-State)

Product specification 1993 Jun 21
IC23 Data Handbook

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Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

FEA TURES

•Low static and dynamic power dissipation with high speed and

high output drive

•Open-collector ERROR output with flag register

•Output capability: +64mA/–32mA

•Latch-up protection exceeds 500mA per Jedec Std 17

•ESD protection exceeds 2000V per MIL STD 883 Method 3015

and 200 V per Machine Model

•Power up/down 3-State

•Live insertion/extraction permitted

DESCRIPTION

The 74ABT833 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.

QUICK REFERENCE DATA

SYMBOL PARAMETER

t

PLH

t

PHL

t

PLH

t

PHL

C
C
I

CCZ

IN

I/O

Propagation delay
An to Bn or Bn to An

Propagation delay
An to PARITY

CL = 50pF; VCC = 5V 3.4 ns

CL = 50pF; VCC = 5V 7.4 ns
Input capacitance VI = 0V or V
I/O capacitance

Outputs disabled;

= 0V or V

V

O

Total supply current Outputs disabled; VCC =5.5V 50 µA

The 74ABT833 is an octal transceiver with a parity
generator/checker and is intended for bus-oriented applications.

When Output Enable A (OEA
high impedance state. Output Enable B (OEB
outputs in the same way.

The parity generator creates an odd parity output (PARITY) when
OEB

is Low. When OEA is Low, the parity of the B port, including
the PARITY input, is checked for odd parity. When an error is
detected, the error data is sent to the input of a storage register. If a
Low-to-High transition happens at the clock input (CP), the error
data is stored in the register and the Open-collector error flag
(ERROR
pulse on the CLEAR

If both OEA
bus and the part is forced into an error condition which creates an
inverted PARITY output. This error condition can be used by the
designer for system diagnostics.

CONDITIONS
= 25°C; GND = 0V

T

amb

CC

CC

74ABT833

) is High, it will place the A outputs in a

) controls the B

) will go Low. The error flag register is cleared with a Low

input.

and OEB are Low, data will flow from the A bus to the B

TYPICAL UNIT

4 pF
7 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

24-Pin Plastic DIP –40°C to +85°C 74ABT833 N 74ABT833 N SOT222-1
24-Pin plastic SO –40°C to +85°C 74ABT833 D 74ABT833 D SOT137-1
24-Pin Plastic SSOP Type II –40°C to +85°C 74ABT833 DB 74ABT833 DB SOT340-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT833 PW 74ABT833PW DH SOT355-1

PIN CONFIGURATION

OEA

A0
A1
A2
A3

A4
A5

A6
A7

ERROR

CLEAR

GND

1
2
3
4
5

6
7

8

9
10
11

TOP VIEW

24
23
22

21
20

19
18

17
16
15
14
1312

V

CC

B0
B1
B2
B3
B4
B5

B6
B7
PARITY
OEB
CP

SA00212

PIN DESCRIPTION

SYMBOL PIN NUMBER NAME AND FUNCTION

A0 – A7

B0 – B7

OEA 1

OEB 14

PARITY 15 Parity output/input
ERROR 10 Error output (open collector)

CLEAR 11

CP 13 Clock input

GND 12 Ground (0V)

V

CC

2, 3, 4, 5,

6, 7, 8, 9

23, 22, 21, 20,

19, 18, 17, 16

A port 3-State inputs/outputs

B port 3-State inputs/outputs
Enables the A outputs when

Low
Enables the B outputs when

Low

Clears the error flag register
when Low

24 Positive supply voltage

1993 Jun 21 853–1619 10087

2

Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

LOGIC SYMBOL

23456789

A0 A1 A2 A3 A4 A5 A6 A7

OEB

14

OEA

1

11

CLEAR
CP13

B0 B1 B2 B3 B4 B5 B6 B7

23 22 21 20 19 18 17 16

PARITY

ERROR

15

10

SA00213

74ABT833

FUNCTION TABLE

INPUTS OUTPUTS

MODE OEB OEA

A data to B bus and generate odd parity
output

B data to A bus and check for parity error
A bus and B bus disabled

2

A data to B bus and generate inverted
parity output

An

Σ of Highs

L H

1

H L (output) X Bn (input) (input)

Odd

Even

H H X X Z Z Z

L L

Odd

Even

Bn + Parity

Σ of Highs

An Bn PARITY

(output) (input) An

(output) (input) An

NOTES:

1. Error checking is detailed in the Error Flag Function T able below.

2. When clocked, the error output is Low if the sum of A inputs is even or High if the sum of A inputs is odd.

ERROR FLAG FUNCTION TABLE

INPUTS Internal node Output

Bn + Parity

Σ of Highs

Odd

Even

X

Point ”P”

H
L
X

Sample

MODE CLEAR CP

H
H
H

↑
↑

X
Hold H ↑ X X X NC
Clear L X X X X H

H = High voltage level steady state
L = Low voltage level steady state
X = Don’t care
NC = No change
Z = High impedance ”off” state
↑ = Low-to-High clock transition

= Not a Low-to-High clock transition

↑

Pre–state

ERROR

H
X

L

n–1

ERROR

OUTPUT

L

H

H

L

H

L
L

1993 Jun 21

3

Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

LOGIC DIAGRAM

8 8

A0 – A7

8

OEB

OEA

88

MUX

B

}

A

}

Sel A/B

74ABT833

B0 – B7

PARITY

9–bit

Odd

Parity

9

Tree

”P”

ERROR

SA00214

CP

CLEAR

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

I

OUT

T

stg

DC supply voltage –0.5 to +7.0 V
DC input diode current VI < 0 –18 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage
DC output current output in Low state 128 mA
Storage temperature range –65 to 150 °C

PARAMETER CONDITIONS RATING UNIT

3

3

D

R

1, 2

–1.2 to +7.0 V

output in Off or High state –0.5 to +5.5 V

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

1993 Jun 21

4

Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER LIMITS UNIT

Min Max

V

CC

V
V
V

V

OH

I

OH

I

OL

∆t/∆v Input transition rise or fall rate 0 5 ns/V
T

amb

DC ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER TEST CONDITIONS T

V

IK

I

OH

V

OH

V

OL

I

I

I

OFF

IPUI

IIH + I

IIL + I

I

CEX

I

O

I

CCH

I

CCL

I

CCZ

∆I

CC

NOTES:

1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

2. This is the increase in supply current for each input at 3.4V.

3. This parameter is valid for any V
transition of up to 100µsec is permitted. The ERROR

DC supply voltage 4.5 5.5 V
Input voltage 0 V

I

High-level input voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

High-level output voltage, ERROR 5.5 V
High-level output current –32 mA
Low-level output current 64 mA

Operating free-air temperature range –40 +85 °C

LIMITS

= +25°C

amb

Min Typ Max Min Max

Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V
High-level output current

ONLY

ERROR

High-level output voltage
All outputs except ERROR

Low-level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V

VCC = 5.5V; VOH = 5.5V; VI = VIL or V
VCC = 4.5V; IOH = –3mA; VI = VIL or V
VCC = 5.0V; IOH = –3mA; VI = VIL or V
VCC = 4.5V; IOH = –32mA; VI = VIL or V

IH

IH

IH

IH

IH

2.5 3.5 2.5 V

3.0 4.0 3.0 V

2.0 2.6 2.0 V

0.42 0.55 0.55 V

20 20 µA

Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA
current Data pins VCC = 5.5V; VI = GND or 5.5V ±5 ±100 ±100 µA

Power-off leakage current VCC = 0.0V; VI or VO ≤ 4.5V ±5.0 ±100 ±100 V
Power-up/down 3-State

PD

output current
3-State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V

OZH

3-State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V

OZL

3

Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V
Output current

1

Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or V

Additional supply current per

2

input pin

CC

VCC = 2.0V; or VO = 0.5V; VI= GND or VCC;

= Don’t care

V

OE

IH
IH

CC

±5.0 ±50 ±50 V

5.0 50 50 µA

–5.0 –50 –50 µA

5.0 50 50 µA
VCC = 5.5V; VO = 2.5V –50 –80 –180 –50 –180 mA
VCC = 5.5V; Outputs High, VI = GND or V

VCC = 5.5V; Outputs 3-State;

= GND or V

V

I

CC

VCC = 5.5V; one input at 3.4V,
other inputs at V

or GND

CC

CC

CC

50 250 250 µA
20 30 30 mA

50 250 250 µA

0.3 1.5 1.5 mA

between 0V and 2.1, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10%, a

output pin 10 is not included in this spec due to the open collector design.

74ABT833

CC

T

= –40°C

amb

to +85°C

V

UNIT

1993 Jun 21

5

Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

AC CHARACTERISTICS

GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω

SYMBOL PARAMETER WAVEFORMS

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

Propagation delay
An to Bn or Bn to An

Propagation delay
An to PARITY

Propagation delay

to PARITY

OEA
Propagation delay

to ERROR

CLEAR
Propagation delay

CP to ERROR
Output enable time

to An or OEB to Bn, PARITY

OEA
Output disable time

to An or OEB to Bn, PARITY

OEA

2
1

2
1

2
5 1.0 2.9 4.4 1.0 5.2 ns

1 2.5 4.2 5.7 2.5 6.2 ns
3

4
3

4

74ABT833

LIMITS

T

= +25oC

amb

= +5.0V

V

CC

Min Typ Max Min Max

1.2

1.0

2.1

2.5

2.6

3.1

1.0

2.1

3.1

3.2

3.4

2.6

7.4

7.4

6.6

6.7

3.2

4.1

5.1

5.6

4.8

4.0

9.5

9.7

8.5

8.6

5.1

5.8

7.3

7.7

T

= –40 to +85oC

amb

= +5.0V ±10%

V

CC

1.2

1.0

2.1

2.5

2.6

3.1

1.0

2.1

3.1

3.2

5.3

4.5

11.2

11.0

10.5

10.0

6.2

6.7

7.9

8.1

UNIT

ns

ns

ns

ns

ns

AC SETUP REQUIREMENTS

GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω

SYMBOL PARAMETER WAVEFORMS

ts(H)

(L)

t

s

th(H)

(L)

t

h

tw(H)

(L)

t

w

tw(L)

t

rec

Setup time, High or Low
Bn or PARITY to CP

Hold time, High or Low
Bn or PARITY to CP

Pulse width, High or Low
CP

Pulse width, Low
CLEAR

Recovery time

to CP

CLEAR

6

6

6

5 3.0 1.0 3.0 ns

5 2.0 –0.3 2.0 ns

LIMITS

T

amb

V

CC

= +25oC
= +5.0V

T

= –40 to +85oC

amb

= +5.0V ±10%

V

CC

Min Typ Min

9.8

8.1

0.0

0.0

3.0

3.0

6.9

4.0

–3.7
–6.7

1.5

1.0

9.8

8.1

0.0

0.0

3.0

3.0

UNIT

ns

ns

ns

1993 Jun 21

6

Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

AC WAVEFORMS

VM = 1.5V, VIN = GND to 3.0V

INPUT

OUTPUT

Waveform 1. Propagation Delay For Inverting Output

OEA, OEB V

OUTPUT

Waveform 3. 3-State Output Enable Time to High Level and

Output Disable Time from High Level

V

M

t

PHL

V

M

t

PLH

V

M

V

M

SA00216

V

M

t

PZH

M

t

PHZ

–0.3V

V

V

M

OH

0V

SA00238

74ABT833

INPUT

OUTPUT

Waveform 2. Propagation Delay For Non-Inverting Output

OEA, OEB

OUTPUT

Waveform 4. 3-State Output Enable Time to Low Level and

Output Disable Time from Low Level

V

M

t

PLH

V

M

t

PHL

V

M

V

M

SA00217

V

V

M

t

PZL

M

t

PLZ

V

M

V

+0.3V

OL

0V

SA00239

CLEAR

CP

ERROR

NOTE: The shaded areas indicate when the input is permitted to change

V

M

t

PLH

for predictable output performance.

tw(L)

V

M

t

REC

V

M

V

M

SA00240

Waveform 5. CLEAR Pulse Width, CLEAR to ERROR Delay and

CLEAR

to Clock Recovery Time

Bn,

PARITY

V

M

M

(H)

t

s

CP

NOTE: The shaded areas indicate when the input is permitted to change

for predictable output performance.

(H)

t

h

tw(H) tw(L)

V

M

V

V

M

M

t

(L)

s

V

M

(L)

t

h

V

M

SA00205

V

Waveform 6. Data Setup and Hold Times and Clock Pulse Width

1993 Jun 21

7

Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

TYPICAL PROPAGATION DELAYS VERSUS LOAD FOR OPEN COLLECTOR OUTPUTS

18

16

14

12

10

8

6

Propagation delay (ns)

4

2

0

0 100 200 300 400 500 600

NOTE:

When using Open-Collector parts, the value of the pull–up resistor greatly affects the value of the t
500Ω to 100Ω will improve the t
that the total I

current through the resistor and the total IIL’s of the receivers does not exceed the IOL maximum specification.

OL

over 300% with only a slight change in the t

PLH

Load resistor (Ω)

. However, if the value of the pull-up resistor is changed, the user must make certain

PHL

. For example, changing the specified pull-up resistor value from

PLH

t

t

PHL

PLH

74ABT833

TEST CIRCUIT AND WAVEFORM

V

CC

V

OUT

C

L

PULSE

GENERATOR

V

IN

D.U.T

R

T

Test Circuit for 3-State Outputs

SWITCH POSITION

TEST SWITCH

t
t

PLZ
PZL

closed
closed

LOAD V ALUES

OUTPUT RXV

ERROR 100Ω V
All other 500Ω 7.0V

All other open

DEFINITIONS

RL = Load resistor; see AC CHARACTERISTICS for value.

= Load capacitance includes jig and probe capacitance;

C

L

see AC CHARACTERISTICS for value.

= Termination resistance should be equal to Z

R

T

pulse generators.

OUT

R

R

of

X

L

CC

SA00241

t

90%

V

X

NEGATIVE
PULSE

POSITIVE
PULSE

10%

V

M

10% 10%

t

THL

t

TLH

90% 90%

V

M

W

V

M

(tF)

(tR)t

V

M

t

W

90%

10%

t

TLH

THL

AMP (V)

0V

(tR)

(tF)

AMP (V)

0V

VM = 1.5V

X

Input Pulse Definition

INPUT PULSE REQUIREMENTS

FAMILY

t

Amplitude Rep. Rate t

W

t

R

F

74ABT 3.0V 1MHz 500ns 2.5ns 2.5ns

SA00242

1993 Jun 21

8

Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

DIP24: plastic dual in-line package; 24 leads (300 mil) SOT222-1 SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1

74ABT833

1993 Jun 21

9

Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

NOTES

74ABT833

1993 Jun 21

10

Philips Semiconductors Product specification

Octal transceiver with parity generator/checker
(3-State)

74ABT833

DEFINITIONS

Data Sheet Identification Product Status Definition

Objective Specification

Preliminary Specification

Product Specification

Formative or in Design

Preproduction Product

Full Production

Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.

LIFE SUPPORT APPLICA TIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected

to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.

This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.

Philips Semiconductors and Philips Electronics North America Corporation

register eligible circuits under the Semiconductor Chip Protection Act.

 Copyright Philips Electronics North America Corporation 1995

All rights reserved. Printed in U.S.A.