SDFS021A – D3126, JANUAR Y 1989 – REVISED OCT OBER 1993
• 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
• Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Plastic and Ceramic DIPs
description
The ′F541 octal buffer/line driver is ideal for driving
bus lines or buffering memory address registers.
The device features inputs and outputs on
opposite sides of the package to facilitate
printed-circuit-board layout.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output enable
or OE2) input is high, all eight outputs are in
(OE1
the high-impedance state.
The SN54F541 is characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74F251 is characterized for
operation from 0°C to 70°C.
SN54F541 ...J PACKAGE
SN74F541 ... DW OR N PACKAGE
SN54F541 . . . FK PACKAGE
A3
A4
A5
A6
A7
(TOP VIEW)
OE1
1
A1
2
A2
3
A3
4
5
A4
6
A5
7
A6
8
A7
9
A8
GND
10
(TOP VIEW)
A2A1OE1
3212019
4
5
6
7
8
10 11 12 13
9
20
19
18
17
16
15
14
13
12
11
V
CC
V
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
18
17
16
15
14
CC
Y1
Y2
Y3
Y4
Y5
FUNCTION TABLE
INPUTS
OE1OE2A
LLLL
LLH H
HXX Z
XHX Z
OUTPUT
Y
A8
GND
Y8
Y7
Y6OE2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1993, Texas Instruments Incorporated
2–1
Page 2
SN54F541, SN74F541
UNIT
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS021A – D3126, JANUAR Y 1989 – REVISED OCT OBER 1993
1
19
2
3
4
5
6
7
8
9
†
&
EN
1
18
17
16
15
14
13
12
11
logic diagram (positive logic)
1
OE1
19
OE2
2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
A1Y1
18
To Seven Other Channels
logic symbol
OE1
OE2
A1
A2
A3
A4
A5
A6
A7
A8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
SDFS021A – D3126, JANUARY 1989 – REVISED OCTOBER 1993
2–4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Page 5
IMPORTANT NOTICE
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pertaining to warranty, patent infringement, and limitation of liability.
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
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intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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