Datasheet 2N5684, 2N5686 Datasheet (ON Semiconductor)

Page 1
2N5684 (PNP), 2N5686 (NPN)
High-Current Complementary Silicon Power Transistors
switching circuit applications.
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Features
High Current Capability - I
DC Current Gain - h
FE
Continuous = 50 Amperes
C
= 15-60 @ IC = 25 Adc
Low Collector-Emitter Saturation Voltage -
V
= 1.0 Vdc (Max) @ IC = 25 Adc
CE(sat)
Pb-Free Packages are Available*
MAXIMUM RATINGS (Note 1)
Rating Symbol Value Unit
Collector-Emitter Voltage V
Collector-Base Voltage V
Emitter-Base Voltage V
Collector Current - Continuous I
Base Current I
Total Power Dissipation @ TC = 25°C Derate above 25°C
Operating and Storage Temperature Range
CEO
P
TJ, T
CB
EB
C
B
D
stg
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction-to-Case
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1. Indicates JEDEC Registered Data.
300
250
200
150
q
JC
80 Vdc
80 Vdc
5.0 Vdc
50 Adc
15 Adc
300
1.715
-65 to +200 °C
0.584 °C/W
mW
mW/°C
50 AMPERE
COMPLEMENTARY SILICON
POWER TRANSISTORS
60-80 VOLTS, 300 WATTS
MARKING DIAGRAM
2N568xG
AYYWW
MEX
TO-204 (TO-3)
CASE 197A
STYLE 1
2N568x = Device Code
G = Pb-Free Package A = Location Code YY = Year WW = Work Week MEX = Country of Orgin
ORDERING INFORMATION
Device Package Shipping
2N5684G TO-3
2N5686 TO-3 100 Units/Tray
2N5686G TO-3
x = 4 or 6
100 Units/Tray
(Pb-Free)
100 Units/Tray
(Pb-Free)
100
, POWER DISSIPATION (WATTS)
50
D
P
0
0 20 40 60 80 100 120 140 160 180 200
TEMPERATURE (°C)
Figure 1. Power Derating
Safe Area Curves are indicated by Figure 5. All limits are applicable and must be observed.
© Semiconductor Components Industries, LLC, 2007
October, 2007 - Rev. 12
1 Publication Order Number:
*For additional information on our Pb-Free strategy
and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
2N5684/D
Page 2
2N5684 (PNP), 2N5686 (NPN)
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ELECTRICAL CHARACTERISTICS (T
= 25_C unless otherwise noted) (Note 2)
C
Characteristic
OFF CHARACTERISTICS
Collector-Emitter Sustaining Voltage (Note 3) (IC = 0.2 Adc, IB = 0)
Collector Cutoff Current (VCE = 40 Vdc, IB = 0)
Collector Cutoff Current
(VCE = 80 Vdc, V
(VCE = 80 Vdc, V
= 1.5 Vdc, TC = 150_C)
EB(off)
EB(off)
= 1.5 Vdc)
Collector Cutoff Current (VCB = 80 Vdc, IE = 0)
Emitter Cutoff Current (VBE = 5.0 Vdc, IC = 0)
ON CHARACTERISTICS
DC Current Gain (Note 3)
(IC = 25 Adc, VCE = 2.0 Vdc) (IC = 50 Adc, VCE = 5.0 Vdc)
Collector-Emitter Saturation Voltage (Note 3)
(IC = 25 Adc, IB = 2.5 Adc)
(IC = 50 Adc, IB = 10 Adc)
Base-Emitter Saturation Voltage (Note 2) (IC = 25 Adc, IB = 2.5 Adc)
Base-Emitter On Voltage (Note 2) (IC = 25 Adc, VCE = 2.0 Vdc)
DYNAMIC CHARACTERISTICS
Current-Gain - Bandwidth Product (IC = 5.0 Adc, VCE = 10 Vdc, f = 1.0 MHz)
Output Capacitance 2N5684 (VCB = 10 Vdc, IE = 0, f = 0.1 MHz) 2N5686
Small-Signal Current Gain (IC = 10 Adc, VCE = 5.0 Vdc, f = 1.0 kHz)
2. Indicates JEDEC Registered Data.
3. Pulse Test: Pulse Width v 300 μs, Duty Cycle v 2.0%.
Symbol
V
CEO(sus)
I
CEO
I
CEX
I
CBO
I
EBO
h
FE
V
CE(sat)
V
BE(sat)
V
BE(on)
f
T
C
ob
h
fe
Min
80
-
-
-
-
-
15
5.0
-
-
-
-
2.0
-
-
15
Max
-
1.0
2.0 10
2.0
5.0
60
-
1.0
5.0
2.0
2.0
-
2000 1200
-
Unit
Vdc
mAdc
mAdc
mAdc
mAdc
-
Vdc
Vdc
Vdc
MHz
pF
+2.0 V
0
tr
20ns
DUTY CYCLE 2.0%
0
-12V
DUTY CYCLE 2.0%
Figure 2. Switching Time Test Circuit
VCC-30 V
R
L
TO SCOPE
R
B
tr 20 ns
-12V
10 to 100 μs
VCC-30 V
R
+10V
L
TO SCOPE
R
B
tr 20ns
10 to 100 μs
VBB+4.0 V
FOR CURVES OF FIGURES 3 & 6, RB & RL ARE VARIED. INPUT LEVELS ARE APPROXIMATELY AS SHOWN. FOR NPN CIRCUITS, REVERSE ALL POLARITIES.
tr 20 ns
t, TIME (s)μ
1.0
0.7 t
0.5
r
0.3
0.2
t
d
2N5684 (PNP) 2N5686 (NPN)
0.1
0.07
0.05
0.03
0.02
0.01
0.5
TJ = 25°C IC/IB = 10 VCC = 30 V
0.7 1.0 2.0 3.0 5.0 7.0 10 50 IC, COLLECTOR CURRENT (AMP)
Figure 3. Turn-On Time
30
20
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1.0
0.7
D = 0.5
0.5
0.3
0.2
0.1
0.07
0.05
0.03
RESISTANCE (NORMALIZED)
0.02
r(t), EFFECTIVE TRANSIENT THERMAL
0.01
0.1
0.05
0.02
SINGLE PULSE
0.02
2N5684 (PNP), 2N5686 (NPN)
0.2
P
θJC(t) = r(t) θ θJC = 0.584°C/W MAX
D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t
t, TIME (ms)
T
J(pk)
0.01
0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20 50 100 200 2000500
- TC = P
JC
(pk) θJC
1
(t)
Figure 4. Thermal Response
(pk)
t
1
t
2
DUTY CYCLE, D = t1/t
2
1000
100
50
20
10
5.0
2.0
1.0
0.5
, COLLECTOR CURRENT (AMP)
C
I
0.2
0.1
1.0
dc
TJ = 200°C SECOND BREAKDOWN LIMITED BONDING WIRE LIMITED THERMALLY LIMITED @ TC = 25°C (SINGLE PULSE) CURVES APPLY BELOW
RATED V
CEO
2.0 3.0 7.0 10 20 30 50 100 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
5.0
500 μs
5.0 ms
2N5684, 2N5686
Figure 5. Active-Region Safe Operating Area
4.0
3.0
2.0
1.0
0.8
t, TIME (s)μ
0.6
0.4
0.3
0.2
0.5
0.7 1.0 2.0 3.0 7.0 20 50
2N5684 (PNP) 2N5686 (NPN)
t
s
t
f
5.0
IC, COLLECTOR CURRENT (AMP)
10
Figure 6. Turn-Off Time
1.0 ms
100 μs
70
TJ = 25°C IB1 = I
B2
IC/IB = 10 VCE = 30 V
30
There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC - V limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 5 is based on T
= 200_C; TC is
J(pk)
variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 10% provided T v 200_C. T
may be calculated from the data in
J(pk)
J(pk)
Figure 4. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown.
5000
TJ = 25°C
3000
2000
C
ib
C
1000
C, CAPACITANCE (pF)
700
500
0.1
C
ib
2N5684 (PNP) 2N5686 (NPN)
2.0 5.0 10 20 100500.2 0.5 1.0
VR, REVERSE VOLTAGE (VOLTS)
Figure 7. Capacitance
ob
C
ob
CE
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Page 4
2N5684 (PNP), 2N5686 (NPN)
PNP 2N5684
500
300 VCE = 2.0 V 200
100
70
50
30
, DC CURRENT GAIN
20
FE
h
10
7.0
5.0
TJ = +150°C
+25°C
-55°C
0.5
0.7 1.0 2.0 5.0 7.0 10 20 50
3.0 30
IC, COLLECTOR CURRENT (AMP)
VCE = 10 V
Figure 8. DC Current Gain
2.0
TJ = 25°C
1.6
40 A
1.2
IC = 10 A
25 A
NPN 2N5686
500
300 200
100
70
50
30
, DC CURRENT GAIN
20
FE
h
10
7.0
5.0
2.0
1.6
1.2
0.5
TJ = +150°C
+25°C
-55°C
0.7 1.0 2.0 5.0 7.0 10 20 50
IC = 10 A
3.0 30
IC, COLLECTOR CURRENT (AMP)
25 A
40 A
VCE = 2.0 V VCE = 10 V
TJ = 25°C
0.8
0.4
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
V
0
0.1
0.2 1.0 2.0 5.0 10
0.5 3.0
IB, BASE CURRENT (AMP)
Figure 9. Collector Saturation Region
2.5
TJ = 25°C
2.0
1.5
V
@ IC/IB = 10
BE(sat)
1.0
V, VOLTAGE (VOLTS)
0.5
0
0.5
0.7 1.0 2.0 3.0 5.0 10 20 50
VBE @ VCE = 2.0 V
V
@ IC/IB = 10
CE(sat)
IC, COLLECTOR CURRENT (AMP)
7.0
0.8
0.4
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
V
0
0.1
2.0
1.6
1.2
0.8
V, VOLTAGE (VOLTS)
0.4
30
0
0.5
Figure 10. “On” Voltages
0.2 1.0 2.0 5.0 10
TJ = 25°C
V
@ IC/IB = 10
BE(sat)
0.7 1.0 2.0 3.0 5.0 10 20 50
0.5 3.0
0.3
IB, BASE CURRENT (AMP)
VBE @ VCE = 2.0 V
V
@ IC/IB = 10
CE(sat)
IC, COLLECTOR CURRENT (AMP)
30
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Page 5
2N5684 (PNP), 2N5686 (NPN)
PACKAGE DIMENSIONS
TO-204 (TO-3)
CASE 197A-05
ISSUE K
A
N
C
E
2 PLD
0.30 (0.012) Y
U
V
H
L
2
1
G
K
-Y-
-T-
M
SEATING PLANE
M
Q
T
M
B
-Q-
0.25 (0.010) T
M
M
Y
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM MIN MAX MIN MAX
A 1.530 REF 38.86 REF B 0.990 1.050 25.15 26.67 C 0.250 0.335 6.35 8.51 D 0.057 0.063 1.45 1.60 E 0.060 0.070 1.53 1.77 G 0.430 BSC 10.92 BSC H 0.215 BSC 5.46 BSC K 0.440 0.480 11.18 12.19 L 0.665 BSC 16.89 BSC N 0.760 0.830 19.31 21.08 Q 0.151 0.165 3.84 4.19 U 1.187 BSC 30.15 BSC V 0.131 0.188 3.33 4.77
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
MILLIMETERSINCHES
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2N5684/D
5
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