The KP1500 series are monolithic integrated
circuits that provide all the active functions for a
step-down DC/DC converter, capable of driving a
3A load without additional transistor component.
Requiring a minimum number of external
component, the board space can be saved easily.
The external shutdown function can be controlled
by TTL logic level and then come into standby
mode. The internal compensation makes feedback
control have good line and load regulation without
external design. Regarding protected function,
thermal shutdown is to prevent over temperature
operating from damage, and current limit is against
over current operating of the output switch. The
KP1500 series operates at a switching frequency of
150Khz thus allowing smaller sized filter
components than what would be needed with lower
frequency switching regulators. Other features
include a guaranteed +4% tolerance on output
voltage under specified input voltage and output
load conditions, and +15% on the oscillator
frequency. The output version included fixed 3.3V,
5V, 12V, and an adjustable type. The packages are
available in a standard 5-lead TO-220(T) package
and a 5-lead TO-263(U).
Pin Assignments
( Top View )
Features
- 3.3V, 5V, 12V and adjustable output versions
- Adjustable version output voltage range, 1.23V to
5A Low Dropout Positive Adjustable or Fixed-Mode Regulator
Features
1.4V maximum dropout at full load current
•
Built-in thermal shutdown
•
•
Output current limiting
Adjustable output voltage or fixed 1.5V, 1.8V, 2.5V,
•
3.3V, 5.0V
•
Fast transient response
Good noise rejection
•
•
Package : TO252, TO263, TO220
General Description
AP1084 is a low dropout positive adjustable or fixedmode regulator with minimum of 5.0A output current
capability. The product is specifically designed to
provide well-regulated supply for low voltage IC
applications such as high-speed bus termination and
low current 3.3V logic supply. AP1084 is also well
suited for other applications such as VGA cards.
AP1084 is guaranteed to have lower than 1.4V
dropout at full load current making it ideal to provide
well-regulated outputs of 1.25 to 3.3V with 4.7 to
12V input supply.
1A Low Dropout Positive Adjustable or Fixed-Mode Regulator
Features
- 1.4V maximum dropout at full load current
- Fast transient response
- Output current limiting
- Built-in thermal shutdown
- Packages: SOT223, TO263, TO252, TO220,
SOT89
- Good noise rejection
- 3-Terminal Adjustable or Fixed 1.5V, 1.8V, 1.9V,
2.5V, 3.3V, 5.0V
Applications
- PC peripheral
- Communication
General Description
AP1117 is a low dropout positive adjustable or
fixed-mode regulator with minimum of 1A output
current capability. The product is specifically
designed to provide well-regulated supply for low
voltage IC applications such as high-speed bus
termination and low current 3.3V logic supply.
AP1117 is also well suited for other applications
such as VGA cards. AP1117 is guaranteed to have
lower than 1.4V dropout at full load current making
it ideal to provide well-regulated outputs of 1.25 to
5.0 with 6.4V to 12V input supply.
Ordering Information
AP 1117 X XX X X
AP1117
Low Dropout Regulator
Typical Circuit
5V
Tab is Vout
( 5V/3.3V fixed output )
Vin
Vout
GND
C1
100uF
PackageVout
E : SOT223-3L
K : TO263-3L
D : TO252-3L
T : TO220-3L
Y : SOT89-3L
The EN29LV040A is a 4-Megabit, electrically erasable, read/write non-volatile flash memory,
organized as 524,288 bytes. Any byte can be programmed typically in 8µs. The EN29LV040A
features 3.0V voltage read and write operation, with access times as fast as 45ns to eliminate the
need for WAIT states in high-performance microprocessor systems.
The EN29LV040A has separate Output Enable (OE), Chip Enable (CE), and Write Enable (WE)
controls, which eliminate bus contention issues. This device is designe d to allow eith er sing le
Sector or full chip erase operation, where each Sector can be individually protected against
program/erase operations or temporarily unprotected to erase or program. The device can sustain a
minimum of 100K program/erase cycles on each Sector.
CONNECTION DIAGRAMS
EN29LV040A
TABLE 1. PIN DESCRIPTION
Pin Name Function
A0-A18 Addresses
DQ0-DQ7 8 Data Inputs/Outputs
WE# Write Enable
CE# Chip Enable
OE# Output Enable
Vcc Supply Voltage
Vss Ground
FIGURE 1. LOGIC DIAGRAM
EN29LV040A
A0 - A18
CE#
OE#
WE#
DQ0 – DQ7
Philips SemiconductorsProduct specification
2 × 6 W stereo power amplifierTDA1517; TDA1517P
FEATURES
• Requires very few external components
• High output power
• Fixed gain
• Good ripple rejection
GENERAL DESCRIPTION
The TDA1517 is an integrated class-B dual output
amplifier in a plastic single in-linemedium powerpackage
with fin (SIL9MPF) and a plastic heat-dissipating dual
in-line package (HDIP18). The device is primarily
developed for multi-media applications.
• Mute/standby switch
• AC and DC short-circuit safe to ground and V
P
• Thermally protected
• Reverse polarity safe
• Capability to handle high energy on outputs (VP=0V)
channel separation40−−dB
closed loop voltage gain192021dB
noise output voltage (RMS value)−50−µV
crystal temperature−−150°C
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
TDA1517SIL9MPFplastic single in-line medium power package with fin; 9 leadsSOT110-1
TDA1517PHDIP18plastic heat-dissipating dual in-line package; 18 leadsSOT398-1
Philips SemiconductorsProduct specification
2 × 6 W stereo power amplifierTDA1517; TDA1517P
PINNING
SYMBOLPINDESCRIPTION
−INV11non-inverting input 1
SGND2signal ground
SVRR3supply voltage ripple rejection output
OUT14output 1
PGND5power ground
OUT26output 2
V
P
M/SS8mute/standby switch input
−INV29non-inverting input 2
7supply voltage
dbook, halfpage
INV1
SGND
SVRR
OUT1
PGND
OUT2
V
M/SS
INV2
1
2
3
4
5
TDA1517
6
7
P
8
9
MLC352
Fig.2 Pin configuration for SOT110-1.
FUNCTIONAL DESCRIPTION
The TDA1517 contains two identical amplifiers with
differential input stages.The gain ofeach amplifier is fixed
at 20 dB. A special feature of the device is the
mute/standby switch which has the following features:
• Low standby current (<100 µA)
• Low mute/standby switching current
• Mute condition.
(low cost supply switch)
dbook, halfpage
Pins 10 to 18 should be connected to GND or floating.
INV1
SGND
SVRR
OUT1
PGND
OUT2
V
M/SS
INV2
1
2
3
4
5
TDA1517P
6
7
P
8
9
18
17
16
15
14
13
12
11
10
MLC353
Fig.3 Pin configuration for SOT398-1.
数字控制音频处理芯片
SM9613
.
2
共 12 页
2-wire Serial EEPROM 32K/64K
AF24BC32/64
FEATURES:
• I nternally organized as 4096 x 8 (32K),
8192 x 8 (64K)
• Low-voltage and standard-voltage
operation : 1.8 to 5.5 V
Aplus Flash Technology’s AF24BC32/64 provides 32K/64K of serial electrically erasable and
programmable read-only memor y (EEPRO M). The wide Vdd range allows for low-voltage
operation down to 1.8V. The device, fabricated using traditional CMOS EEPROM technology, is
optimized for many industrial and commer cial applications where low-voltage and low-power
operation is essential. The AF24BC32/64 is available in 8-pin PDIP, 8- lead JEDEC SOIC, 8lead TSSOP
interface.
Figure 1. Pin Configurations
8-pin PDIP/TSSOP/SOIC/MSOP
A0
A1 WP
A2
GND 4
1
2
3
8-lead MSOP (AF24BC32)
and
8
7
6
5
Vcc
SCL
SDA
• Self-timed write cycle (5ms max)
• Bi- dir ectional data transfer protocol
• Write prot ect pin for hardware data
protection
• 32- byte page write modes
• Allows f o r par tial page writes
• 8- lead PDIP, 8-lead JEDEC SOIC, and
8-lead TSSOP, 8-lead MSOP
(AF24BC32) Packages
packages and is accessed via a 2-wire serial
Pin Name Function
A0 – A2 Address inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
GND Ground
Vcc Power Supply
• Multistandard true synchronous demodulation with
active carrier regeneration: very linear demodulation,
good intermodulation figures, reduced harmonics, and
excellent pulse response
• Gated phase detector for L and L-accent standard
• Fully integrated VIF Voltage Controlled Oscillator
(VCO), alignment-free, frequencies switchable for all
negative and positive modulated standards via I2C-bus
• Digital acquisition help, VIF frequencies of 33.4, 33.9,
38.0, 38.9, 45.75, and 58.75 MHz
• 4 MHz reference frequency input: signal from
Phase-Locked Loop (PLL) tuning system or operating
as crystal oscillator
• VIF Automatic Gain Control (AGC) detector for gain
control, operating as peak sync detector for negative
modulated signals and as a peak white detector for
positive modulated signals
• External AGC setting via pin OP1
• Precise fully digital Automatic Frequency Control(AFC)
detector with 4-bit digital-to-analog converter, AFC bits
readable via I2C-bus
• TakeOver Point (TOP) adjustable via I2C-bus or
alternatively with potentiometer
• Fully integrated sound carrier trap for 4.5, 5.5, 6.0,
and 6.5 MHz, controlled by FM-PLL oscillator
• Sound IF (SIF) input for single reference Quasi Split
Sound (QSS) mode, PLL controlled
TDA9885; TDA9886
• SIF-AGC for gain controlled SIF amplifier, single
reference QSS mixer able to operate in high
performance single reference QSS mode and in
intercarrier mode, switchable via I
• AM demodulator without extra reference circuit
• Alignment-free selective FM-PLLdemodulator with high
linearity and low noise
• I2C-bus control for all functions
• I2C-bus transceiver with pin programmable Module
Address (MAD)
• Four I2C-bus addresses via MAD.
2GENERAL DESCRIPTION
The TDA9885 is an alignment-free multistandard
(PAL and NTSC) vision and sound IF signal PLL
demodulator for negative modulation only and
FM processing.
The TDA9886 is an alignment-free multistandard
(PAL, SECAM and NTSC) vision and sound IF signal PLL
demodulator for positive and negative modulation,
including sound AM and FM processing.
3APPLICATIONS
• TV, VTR, PC and STB applications.
2
C-bus
4ORDERING INFORMATION
TYPE NUMBER
NAMEDESCRIPTIONVERSION
TDA9885T/V3SO24plastic small outline package; 24 leads; body width 7.5 mmSOT137-1
TDA9885TS/V3SSOP24plastic shrink small outline package; 24 leads; body width 5.3 mmSOT340-1
TDA9885HN/V3HVQFN32plastic, heatsink very thin quad flat package; no leads; 32 terminals;
body 5 × 5 × 0.85 mm
TDA9886T/V3SO24plastic small outline package; 24 leads; body width 7.5 mmSOT137-1
TDA9886TS/V3SSOP24plastic shrink small outline package; 24 leads; body width 5.3 mmSOT340-1
PACKAGE
SOT617-1
Philips SemiconductorsProduct specification
I2C-buscontrolledsingleand multistandard
TDA9885; TDA9886
alignment-free IF-PLL demodulators
7PINNING
PIN
SYMBOL
VIF11130VIF differential input 1
VIF22231VIF differential input 2
n.c.−−32not connected
OP1331output port 1; open-collector
FMPLL442FM-PLL for loop filter
DEEM553de-emphasis output for capacitor
AFD664AF decoupling input for capacitor
DGND775digital ground
n.c.−−6not connected
AUD887audio output
TOP998tuner AGC TakeOver Point (TOP)for resistor adjustment
SDA10109I
SCL111110I
SIOMAD121211sound intercarrier output and MAD select with resistor
n.c.−−12not connected
n.c.131313not connected
n.c.−−14not connected
TAGC141415tuner AGC output
REF1515164 MHz crystal or reference signal input
VAGC16−−VIF-AGC for capacitor
n.c.−1617not connected
CVBS171718composite video output
n.c.−−19not connected
AGND181820analog ground
VPLL191921VIF-PLL for loop filter
V
P
AFC212123AFC output
OP2222224output port 2; open-collector
n.c.−−25not connected
SIF1232326SIF differential input 1 and MAD select with resistor
SIF2242427SIF differential input 2 and MAD select with resistor
n.c.−−28not connected
n.c.−−29not connected
TDA9886T
TDA9886TS
202022supply voltage
TDA9885T
TDA9885TS
TDA9885HN
2
C-bus data input and output
2
C-bus clock input
DESCRIPTION
SHANGHAI JINXIN
ELECTRONICS LTD.
1. SCOPE.
This specification applies to VHF and UHF tuner model
UVL7605VMW
1 AGC VHF/UHF AGC Terminal
2 VT Tuning Voltage monitor
3 AS Address Select
4 SCL Serial Clock Line
5 SDA Serial Data Line
6 +B 5V supply voltage
7 BP Internal connection to pin 6
9 BT Tuning Voltage Supply
10 IF1 IF Output (balanced)
11 IF2 IF Output (balanced)
12 U /V ANT VHF/UHFANT Terminal
10. STANDRAD TEST CONDITIONS
Unless otherwise specified, the tests shall be carried out at the temperature
SPECIFICATION
UVL7605VMW
of 25℃±2℃and relative humidity of 65%±15%
11.ELECTRICAL CHARATERISTICS
11.1 Power gain
Min
VHF L 32 35 dB
VHF H 32 35 dB
UHF 32 35 dB
11.2 Gain variation
Min
VHF L 8.0 dB
VHF H 8.0 dB
UHF 8.0 dB
11.3 Noise figure
Typ Max Unit
Typ Max Unit
Min Typ Max Unit
VHF L 5.0 9.0 dB
VHF H 5.0 9.0 dB
HF 5.0 9.0 dB
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